diff -r a98d9a0c41d5 -r d656f2052c75 src/arch/alpha/isa/decoder.isa
--- a/src/arch/alpha/isa/decoder.isa	Fri Sep 09 22:29:54 2011 -0700
+++ b/src/arch/alpha/isa/decoder.isa	Fri Sep 09 23:13:33 2011 -0700
@@ -985,7 +985,7 @@
                 PseudoInst::loadsymbol(xc->tcBase());
             }}, No_OpClass, IsNonSpeculative);
             0x30: initparam({{
-                Ra = xc->tcBase()->getCpuPtr()->system->init_param;
+                Ra = PseudoInst::initParam(xc->tcBase());
             }});
 #endif
             0x40: resetstats({{
diff -r a98d9a0c41d5 -r d656f2052c75 src/arch/arm/isa/insts/m5ops.isa
--- a/src/arch/arm/isa/insts/m5ops.isa	Fri Sep 09 22:29:54 2011 -0700
+++ b/src/arch/arm/isa/insts/m5ops.isa	Fri Sep 09 23:13:33 2011 -0700
@@ -190,12 +190,7 @@
     exec_output += PredOpExecute.subst(loadsymbolIop)
 
     initparamCode = '''
-#if FULL_SYSTEM
-    Rt = xc->tcBase()->getCpuPtr()->system->init_param;
-#else
-    PseudoInst::panicFsOnlyPseudoInst("initparam");
-    Rt = 0;
-#endif
+    Rt = PseudoInst::initParam(xc->tcBase());
     '''
 
     initparamIop = InstObjParams("initparam", "Initparam", "PredOp",
diff -r a98d9a0c41d5 -r d656f2052c75 src/arch/x86/isa/decoder/two_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa	Fri Sep 09 22:29:54 2011 -0700
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa	Fri Sep 09 23:13:33 2011 -0700
@@ -161,8 +161,7 @@
                         }}, IsNonSpeculative);
 #if FULL_SYSTEM
                         0x30: m5initparam({{
-                            Rax = xc->tcBase()->getCpuPtr()->
-                                      system->init_param;
+                            Rax = PseudoInst::initParam(xc->tcBase());
                         }}, IsNonSpeculative);
                         0x31: m5loadsymbol({{
                             PseudoInst::loadsymbol(xc->tcBase());
diff -r a98d9a0c41d5 -r d656f2052c75 src/sim/pseudo_inst.hh
--- a/src/sim/pseudo_inst.hh	Fri Sep 09 22:29:54 2011 -0700
+++ b/src/sim/pseudo_inst.hh	Fri Sep 09 23:13:33 2011 -0700
@@ -54,6 +54,7 @@
     uint64_t offset);
 void loadsymbol(ThreadContext *xc);
 void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
+uint64_t initParam(ThreadContext *xc);
 
 #else
 
@@ -110,6 +111,12 @@
 {
     panicFsOnlyPseudoInst("addSymbol");
 }
+static inline uint64_t
+initParam(ThreadContext *xc)
+{
+    panicFsOnlyPseudoInst("initParam");
+    return 0;
+}
 
 #endif
 
diff -r a98d9a0c41d5 -r d656f2052c75 src/sim/pseudo_inst.cc
--- a/src/sim/pseudo_inst.cc	Fri Sep 09 22:29:54 2011 -0700
+++ b/src/sim/pseudo_inst.cc	Fri Sep 09 23:13:33 2011 -0700
@@ -260,6 +260,12 @@
     debugSymbolTable->insert(addr,symbol);
 }
 
+uint64_t
+initParam(ThreadContext *tc)
+{
+    return tc->getCpuPtr()->system->init_param;
+}
+
 #endif