diff -r 0e30a389d952 -r 8b2fa49099fc src/arch/alpha/isa/decoder.isa
--- a/src/arch/alpha/isa/decoder.isa	Sat Sep 10 03:11:50 2011 -0700
+++ b/src/arch/alpha/isa/decoder.isa	Sat Sep 10 03:37:13 2011 -0700
@@ -203,21 +203,13 @@
                 31: decode IMM {
                     1: decode INTIMM {
                         // return EV5 for FULL_SYSTEM and EV6 otherwise
-                        1: implver({{
-#if FULL_SYSTEM
-                             Rc = 1;
-#else
-                             Rc = 2;
-#endif
-                        }});
+                        1: implver({{ Rc = FULL_SYSTEM ? 1 : 2 }});
                     }
                 }
             }
 
-#if FULL_SYSTEM
             // The mysterious 11.25...
             0x25: WarnUnimpl::eleven25();
-#endif
         }
 
         0x12: decode INTFUNC {
@@ -788,11 +780,7 @@
                  * the parser to understand that.
                  */
                 uint64_t unused_var M5_VAR_USED = Rb;
-#if FULL_SYSTEM
-                Ra = xc->readMiscReg(IPR_CC);
-#else
-                Ra = curTick();
-#endif
+                Ra = FULL_SYSTEM ? xc->readMiscReg(IPR_CC) : curTick();
             }}, IsUnverifiable);
 
             // All of the barrier instructions below do nothing in
@@ -817,23 +805,20 @@
             0x4400: wmb({{ }}, IsWriteBarrier, MemWriteOp);
         }
 
-#if FULL_SYSTEM
-        format BasicOperate {
-            0xe000: rc({{
+        0xe000: decode FULL_SYSTEM {
+            0: FailUnimpl::rc_se();
+            default: BasicOperate::rc({{
                 Ra = IntrFlag;
                 IntrFlag = 0;
             }}, IsNonSpeculative, IsUnverifiable);
-            0xf000: rs({{
+        }
+        0xf000: decode FULL_SYSTEM {
+            0: FailUnimpl::rs_se();
+            default: BasicOperate::rs({{
                 Ra = IntrFlag;
                 IntrFlag = 1;
             }}, IsNonSpeculative, IsUnverifiable);
         }
-#else
-        format FailUnimpl {
-            0xe000: rc();
-            0xf000: rs();
-        }
-#endif
     }
 
 #if FULL_SYSTEM
diff -r 0e30a389d952 -r 8b2fa49099fc src/arch/alpha/isa/fp.isa
--- a/src/arch/alpha/isa/fp.isa	Sat Sep 10 03:11:50 2011 -0700
+++ b/src/arch/alpha/isa/fp.isa	Sat Sep 10 03:37:13 2011 -0700
@@ -42,21 +42,14 @@
     /// instruction in full-system mode.
     /// @retval Full-system mode: NoFault if FP is enabled, FenFault
     /// if not.  Non-full-system mode: always returns NoFault.
-#if FULL_SYSTEM
     inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc)
     {
         Fault fault = NoFault;  // dummy... this ipr access should not fault
-        if (!ICSR_FPE(xc->readMiscReg(IPR_ICSR))) {
+        if (FULL_SYSTEM && !ICSR_FPE(xc->readMiscReg(IPR_ICSR))) {
             fault = new FloatEnableFault;
         }
         return fault;
     }
-#else
-    inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc)
-    {
-        return NoFault;
-    }
-#endif
 }};
 
 output header {{