diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/buffers/MessageBuffer.hh --- a/src/mem/ruby/buffers/MessageBuffer.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/buffers/MessageBuffer.hh Fri Sep 30 23:05:19 2011 -0400 @@ -141,8 +141,6 @@ void clear(); void print(std::ostream& out) const; - void printStats(std::ostream& out); - void clearStats() { m_not_avail_count = 0; m_msg_counter = 0; } void setIncomingLink(int link_id) { m_input_link_id = link_id; } void setVnet(int net) { m_vnet_id = net; } @@ -181,8 +179,11 @@ int m_size_at_cycle_start; int m_msgs_this_cycle; + //@todo: MAKE A STATISTIC HERE int m_not_avail_count; // count the # of times I didn't have N // slots available + + //@todo: MAKE A STATISTIC HERE uint64 m_msg_counter; int m_priority_rank; bool m_strict_fifo; diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/buffers/MessageBuffer.cc --- a/src/mem/ruby/buffers/MessageBuffer.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/buffers/MessageBuffer.cc Fri Sep 30 23:05:19 2011 -0400 @@ -425,10 +425,3 @@ sort_heap(copy.begin(), copy.end(), greater()); ccprintf(out, "%s] %s", copy, m_name); } - -void -MessageBuffer::printStats(ostream& out) -{ - out << "MessageBuffer: " << m_name << " stats - msgs:" << m_msg_counter - << " full:" << m_not_avail_count << endl; -} diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/common/Driver.hh --- a/src/mem/ruby/common/Driver.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/common/Driver.hh Fri Sep 30 23:05:19 2011 -0400 @@ -53,9 +53,6 @@ int conflict_thread) const; virtual void printDebug(); //called by Sequencer - virtual void printStats(std::ostream& out) const = 0; - virtual void clearStats() = 0; - virtual void printConfig(std::ostream& out) const = 0; virtual integer_t readPhysicalMemory(int procID, physical_address_t addr, diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/Network.hh --- a/src/mem/ruby/network/Network.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/Network.hh Fri Sep 30 23:05:19 2011 -0400 @@ -92,8 +92,6 @@ virtual void reset() = 0; - virtual void printStats(std::ostream& out) const = 0; - virtual void clearStats() = 0; virtual void printConfig(std::ostream& out) const = 0; virtual void print(std::ostream& out) const = 0; diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/Topology.hh --- a/src/mem/ruby/network/Topology.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/Topology.hh Fri Sep 30 23:05:19 2011 -0400 @@ -78,8 +78,6 @@ void initNetworkPtr(Network* net_ptr); const std::string getName() { return m_name; } - void printStats(std::ostream& out) const; - void clearStats(); void printConfig(std::ostream& out) const; void print(std::ostream& out) const { out << "[Topology]"; } diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/Topology.cc --- a/src/mem/ruby/network/Topology.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/Topology.cc Fri Sep 30 23:05:19 2011 -0400 @@ -270,22 +270,6 @@ } void -Topology::printStats(std::ostream& out) const -{ - for (int cntrl = 0; cntrl < m_controller_vector.size(); cntrl++) { - m_controller_vector[cntrl]->printStats(out); - } -} - -void -Topology::clearStats() -{ - for (int cntrl = 0; cntrl < m_controller_vector.size(); cntrl++) { - m_controller_vector[cntrl]->clearStats(); - } -} - -void Topology::printConfig(std::ostream& out) const { if (m_print_config == false) diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh --- a/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh Fri Sep 30 23:05:19 2011 -0400 @@ -68,8 +68,6 @@ MessageBuffer* getFromNetQueue(NodeID id, bool ordered, int network_num, std::string vnet_type); - void clearStats(); - void printStats(std::ostream& out) const; void printConfig(std::ostream& out) const; void print(std::ostream& out) const; diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc --- a/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc Fri Sep 30 23:05:19 2011 -0400 @@ -254,11 +254,6 @@ return m_fromNetQueues[id][network_num]; } -void -GarnetNetwork_d::clearStats() -{ - m_ruby_start = g_eventQueue_ptr->getTime(); -} Time GarnetNetwork_d::getRubyStartTime() @@ -266,6 +261,8 @@ return m_ruby_start; } + +/* MAKE SURE THIS STUFF STILL GETS PRINTED CORRECTLY void GarnetNetwork_d::printStats(ostream& out) const { @@ -349,8 +346,8 @@ out << "Router Static Power = " << m_static_router_power << " W" << endl; out << "Total Router Power = " << m_total_router_power << " W " <printStats(out); } +*/ void GarnetNetwork_d::printConfig(ostream& out) const diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh --- a/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh Fri Sep 30 23:05:19 2011 -0400 @@ -65,8 +65,6 @@ MessageBuffer* getFromNetQueue(NodeID id, bool ordered, int network_num, std::string vnet_type); - void clearStats(); - void printStats(std::ostream& out) const; void printConfig(std::ostream& out) const; void print(std::ostream& out) const; diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc --- a/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc Fri Sep 30 23:05:19 2011 -0400 @@ -207,18 +207,13 @@ return m_fromNetQueues[id][network_num]; } -void -GarnetNetwork::clearStats() -{ - m_ruby_start = g_eventQueue_ptr->getTime(); -} - Time GarnetNetwork::getRubyStartTime() { return m_ruby_start; } +/* MAKE SURE THIS STUFF STILL GETS PRINTED OUT void GarnetNetwork::printStats(ostream& out) const { @@ -253,6 +248,7 @@ if (!m_in_use[i/m_vcs_per_vnet]) continue; + //@todo: make this work without m_ruby_start average_vc_load[i] = (double(average_vc_load[i]) / (double(g_eventQueue_ptr->getTime()) - m_ruby_start)); out << "Average VC Load [" << i << "] = " << average_vc_load[i] << @@ -270,9 +266,8 @@ << ((double) (m_queueing_latency + m_network_latency) / (double) m_flits_received)<< endl; out << "-------------" << endl; - - m_topology_ptr->printStats(out); } +*/ void GarnetNetwork::printConfig(ostream& out) const @@ -305,7 +300,6 @@ for (int i = 0; i < m_router_ptr_vector.size(); i++) { m_router_ptr_vector[i]->printConfig(out); } - m_topology_ptr->printConfig(out); } void diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/simple/PerfectSwitch.hh --- a/src/mem/ruby/network/simple/PerfectSwitch.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/simple/PerfectSwitch.hh Fri Sep 30 23:05:19 2011 -0400 @@ -75,8 +75,6 @@ void wakeup(); void storeEventInfo(int info); - void printStats(std::ostream& out) const; - void clearStats(); void printConfig(std::ostream& out) const; void print(std::ostream& out) const; diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/simple/PerfectSwitch.cc --- a/src/mem/ruby/network/simple/PerfectSwitch.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/simple/PerfectSwitch.cc Fri Sep 30 23:05:19 2011 -0400 @@ -322,16 +322,6 @@ m_pending_message_count[info]++; } -void -PerfectSwitch::printStats(std::ostream& out) const -{ - out << "PerfectSwitch printStats" << endl; -} - -void -PerfectSwitch::clearStats() -{ -} void PerfectSwitch::printConfig(std::ostream& out) const diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/simple/SimpleNetwork.hh --- a/src/mem/ruby/network/simple/SimpleNetwork.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/simple/SimpleNetwork.hh Fri Sep 30 23:05:19 2011 -0400 @@ -57,8 +57,8 @@ int getEndpointBandwidth() { return m_endpoint_bandwidth; } bool getAdaptiveRouting() {return m_adaptive_routing; } + void regStats(); void printStats(std::ostream& out) const; - void clearStats(); void printConfig(std::ostream& out) const; void reset(); diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/simple/SimpleNetwork.cc --- a/src/mem/ruby/network/simple/SimpleNetwork.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/simple/SimpleNetwork.cc Fri Sep 30 23:05:19 2011 -0400 @@ -237,6 +237,21 @@ } void +SimpleNetwork::regStats() +{ + for (int i = 0; i < m_switch_ptr_vector.size(); i++) { + const std::vector* throttles = + m_switch_ptr_vector[i]->getThrottles(); + for(std::vector::const_iterator it = throttles->begin(); + it != throttles->end(); + it++) { + (*it)->regStats(); + } + } +} + +//@todo: MAKE SURE THESE ARE STILL BEING PRINTED +void SimpleNetwork::printStats(ostream& out) const { out << endl; @@ -261,7 +276,7 @@ for (int p = 0; p < throttles->size(); p++) { - const std::vector >& message_counts = + const std::vector > message_counts = ((*throttles)[p])->getCounters(); for (MessageSizeType type = MessageSizeType_FIRST; @@ -298,19 +313,6 @@ << " total_bytes: " << total_bytes << endl; out << endl; - for (int i = 0; i < m_switch_ptr_vector.size(); i++) { - m_switch_ptr_vector[i]->printStats(out); - } - m_topology_ptr->printStats(out); -} - -void -SimpleNetwork::clearStats() -{ - for (int i = 0; i < m_switch_ptr_vector.size(); i++) { - m_switch_ptr_vector[i]->clearStats(); - } - m_topology_ptr->clearStats(); } void diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/simple/Switch.hh --- a/src/mem/ruby/network/simple/Switch.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/simple/Switch.hh Fri Sep 30 23:05:19 2011 -0400 @@ -66,8 +66,6 @@ void clearBuffers(); void reconfigureOutPort(const NetDest& routing_table_entry); - void printStats(std::ostream& out) const; - void clearStats(); void printConfig(std::ostream& out) const; void print(std::ostream& out) const; diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/simple/Switch.cc --- a/src/mem/ruby/network/simple/Switch.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/simple/Switch.cc Fri Sep 30 23:05:19 2011 -0400 @@ -132,6 +132,8 @@ return &m_throttles; } +//@todo: DOUBLE-CHECK THAT THESE STATS ARE STILL BEING PRINTED +/* void Switch::printStats(std::ostream& out) const { @@ -176,7 +178,7 @@ if (!throttle_ptr) continue; - const vector >& message_counts = + const vector > message_counts = throttle_ptr->getCounters(); for (int int_type = 0; int_type < MessageSizeType_NUM; int_type++) { MessageSizeType type = MessageSizeType(int_type); @@ -196,16 +198,7 @@ } out << endl; } - -void -Switch::clearStats() -{ - m_perfect_switch_ptr->clearStats(); - for (int i = 0; i < m_throttles.size(); i++) { - if (m_throttles[i] != NULL) - m_throttles[i]->clearStats(); - } -} +*/ void Switch::printConfig(std::ostream& out) const diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/simple/Throttle.hh --- a/src/mem/ruby/network/simple/Throttle.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/simple/Throttle.hh Fri Sep 30 23:05:19 2011 -0400 @@ -42,6 +42,7 @@ #include #include +#include "base/statistics.hh" #include "mem/ruby/common/Consumer.hh" #include "mem/ruby/common/Global.hh" #include "mem/ruby/network/Network.hh" @@ -66,8 +67,7 @@ const std::vector& out_vec); void wakeup(); - void printStats(std::ostream& out) const; - void clearStats(); + void regStats(); void printConfig(std::ostream& out) const; // The average utilization (a percent) since last clearStats() double getUtilization() const; @@ -78,10 +78,20 @@ } int getLatency() const { return m_link_latency; } - const std::vector >& + std::vector > getCounters() const { - return m_message_counters; + std::vector > vec; + vec.resize(m_message_counters.size()); + + for (int i = 0; i < m_message_counters.size(); i++) { + vec[i].resize(m_message_counters[i].size()); + for (int j = 0; j < m_message_counters[i].size(); j++) { + vec[i][j] = m_message_counters[i][j]->value(); + } + } + + return vec; } void clear(); @@ -100,7 +110,7 @@ std::vector m_in; std::vector m_out; - std::vector > m_message_counters; + std::vector > m_message_counters; int m_vnets; std::vector m_units_remaining; int m_sID; @@ -111,8 +121,8 @@ int m_endpoint_bandwidth; // For tracking utilization - Time m_ruby_start; - double m_links_utilized; + Stats::Scalar m_links_utilized; + Stats::Formula m_links_utilization; }; inline std::ostream& diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/network/simple/Throttle.cc --- a/src/mem/ruby/network/simple/Throttle.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/network/simple/Throttle.cc Fri Sep 30 23:05:19 2011 -0400 @@ -29,6 +29,7 @@ #include #include "base/cprintf.hh" +#include "base/statistics.hh" #include "debug/RubyNetwork.hh" #include "mem/ruby/buffers/MessageBuffer.hh" #include "mem/ruby/network/simple/Throttle.hh" @@ -74,7 +75,6 @@ m_endpoint_bandwidth = endpoint_bandwidth; m_wakeups_wo_switch = 0; - clearStats(); } void @@ -99,7 +99,8 @@ for (int i = 0; i < MessageSizeType_NUM; i++) { m_message_counters[i].resize(in_vec.size()); for (int j = 0; jpop(); // Count the message - m_message_counters[net_msg_ptr->getMessageSize()][vnet]++; + (*(m_message_counters[net_msg_ptr->getMessageSize()][vnet]))++; DPRINTF(RubyNetwork, "%s\n", *m_out[vnet]); } @@ -219,24 +220,29 @@ } void -Throttle::printStats(ostream& out) const +Throttle::regStats() { - out << "utilized_percent: " << getUtilization() << endl; -} + m_links_utilization + .name(csprintf("%s.link-utilization", name())) + .desc("The utlization ratio for this link") + ; + m_links_utilization = 100.0 * (m_links_utilized / Stats::constant(g_eventQueue_ptr->getTime())); + // Not sure what the right calculation is here yet... + //(simTicks/ + // Stats::constant(g_eventQueue_ptr->getClock()))); -void -Throttle::clearStats() -{ - m_ruby_start = g_eventQueue_ptr->getTime(); - m_links_utilized = 0.0; - for (int i = 0; i < m_message_counters.size(); i++) { - for (int j = 0; j < m_message_counters[i].size(); j++) { - m_message_counters[i][j] = 0; + for (int i = 0; i < MessageSizeType_NUM; i++) { + for (int j = 0; jname(csprintf("%s.vnet%i.mtype%i.message-count", name(), j, i)) + .desc("Message Count") + ; } } } + void Throttle::printConfig(ostream& out) const { @@ -245,8 +251,7 @@ double Throttle::getUtilization() const { - return 100.0 * double(m_links_utilized) / - double(g_eventQueue_ptr->getTime()-m_ruby_start); + return m_links_utilization.total(); } void diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/profiler/AddressProfiler.hh --- a/src/mem/ruby/profiler/AddressProfiler.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/profiler/AddressProfiler.hh Fri Sep 30 23:05:19 2011 -0400 @@ -32,6 +32,7 @@ #include #include "base/hashmap.hh" +#include "base/statistics.hh" #include "mem/protocol/AccessType.hh" #include "mem/protocol/RubyRequest.hh" #include "mem/ruby/common/Address.hh" @@ -51,8 +52,10 @@ AddressProfiler(int num_of_sequencers); ~AddressProfiler(); + std::string name() { return "Ruby.AddressProfiler"; } + void printStats(std::ostream& out) const; - void clearStats(); + void regStats(); void addTraceSample(Address data_addr, Address pc_addr, RubyRequestType type, RubyAccessMode access_mode, @@ -74,17 +77,18 @@ AddressProfiler(const AddressProfiler& obj); AddressProfiler& operator=(const AddressProfiler& obj); + // @todo: MAKE STATISTIC HERE int64 m_sharing_miss_counter; AddressMap m_dataAccessTrace; AddressMap m_macroBlockAccessTrace; AddressMap m_programCounterAccessTrace; AddressMap m_retryProfileMap; - Histogram m_retryProfileHisto; - Histogram m_retryProfileHistoWrite; - Histogram m_retryProfileHistoRead; - Histogram m_getx_sharing_histogram; - Histogram m_gets_sharing_histogram; + Stats::Histogram m_retryProfileHisto; + Stats::Histogram m_retryProfileHistoWrite; + Stats::Histogram m_retryProfileHistoRead; + Stats::Histogram m_getx_sharing_histogram; + Stats::Histogram m_gets_sharing_histogram; //added by SS bool m_hot_lines; diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/profiler/AddressProfiler.cc --- a/src/mem/ruby/profiler/AddressProfiler.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/profiler/AddressProfiler.cc Fri Sep 30 23:05:19 2011 -0400 @@ -146,7 +146,6 @@ AddressProfiler::AddressProfiler(int num_of_sequencers) { m_num_of_sequencers = num_of_sequencers; - clearStats(); } AddressProfiler::~AddressProfiler() @@ -175,8 +174,8 @@ out << endl; out << "sharing_misses: " << m_sharing_miss_counter << endl; - out << "getx_sharing_histogram: " << m_getx_sharing_histogram << endl; - out << "gets_sharing_histogram: " << m_gets_sharing_histogram << endl; + // out << "getx_sharing_histogram: " << m_getx_sharing_histogram << endl; + // out << "gets_sharing_histogram: " << m_gets_sharing_histogram << endl; out << endl; out << "Hot Data Blocks" << endl; @@ -213,12 +212,12 @@ out << "Retry Profile" << endl; out << "-------------" << endl; out << endl; - out << "retry_histogram_absolute: " << m_retryProfileHisto << endl; - out << "retry_histogram_write: " << m_retryProfileHistoWrite << endl; - out << "retry_histogram_read: " << m_retryProfileHistoRead << endl; + // out << "retry_histogram_absolute: " << m_retryProfileHisto << endl; + // out << "retry_histogram_write: " << m_retryProfileHistoWrite << endl; + // out << "retry_histogram_read: " << m_retryProfileHistoRead << endl; out << "retry_histogram_percent: "; - m_retryProfileHisto.printPercent(out); + // m_retryProfileHisto.printPercent(out); out << endl; printSorted(out, m_num_of_sequencers, m_retryProfileMap, @@ -228,19 +227,37 @@ } void -AddressProfiler::clearStats() +AddressProfiler::regStats() { - // Clear the maps - m_sharing_miss_counter = 0; - m_dataAccessTrace.clear(); - m_macroBlockAccessTrace.clear(); - m_programCounterAccessTrace.clear(); - m_retryProfileMap.clear(); - m_retryProfileHisto.clear(); - m_retryProfileHistoRead.clear(); - m_retryProfileHistoWrite.clear(); - m_getx_sharing_histogram.clear(); - m_gets_sharing_histogram.clear(); + m_retryProfileHisto + .init(50) + .name("ruby.retry_histogram_absolute") + .desc("??") + ; + + m_retryProfileHistoRead + .init(50) + .name("ruby.retry_histogram_read") + .desc("??") + ; + + m_retryProfileHistoWrite + .init(50) + .name("ruby.retry_histogram_write") + .desc("??") + ; + + m_getx_sharing_histogram + .init(50) + .name("ruby.getx_sharing_histogram") + .desc("??") + ; + + m_gets_sharing_histogram + .init(50) + .name("ruby.gets_sharing_histogram") + .desc("??") + ; } void @@ -254,7 +271,7 @@ indirection_set.remove(requestor); int num_indirections = indirection_set.count(); - m_getx_sharing_histogram.add(num_indirections); + m_getx_sharing_histogram.sample(num_indirections); bool indirection_miss = (num_indirections > 0); addTraceSample(datablock, PC, RubyRequestType_ST, RubyAccessMode(0), @@ -271,7 +288,7 @@ indirection_set.remove(requestor); int num_indirections = indirection_set.count(); - m_gets_sharing_histogram.add(num_indirections); + m_gets_sharing_histogram.sample(num_indirections); bool indirection_miss = (num_indirections > 0); addTraceSample(datablock, PC, RubyRequestType_LD, RubyAccessMode(0), @@ -319,11 +336,11 @@ AddressProfiler::profileRetry(const Address& data_addr, AccessType type, int count) { - m_retryProfileHisto.add(count); + m_retryProfileHisto.sample(count); if (type == AccessType_Read) { - m_retryProfileHistoRead.add(count); + m_retryProfileHistoRead.sample(count); } else { - m_retryProfileHistoWrite.add(count); + m_retryProfileHistoWrite.sample(count); } if (count > 1) { lookupTraceForAddress(data_addr, m_retryProfileMap).addSample(count); diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/profiler/CacheProfiler.hh --- a/src/mem/ruby/profiler/CacheProfiler.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/profiler/CacheProfiler.hh Fri Sep 30 23:05:19 2011 -0400 @@ -33,6 +33,7 @@ #include #include +#include "base/statistics.hh" #include "mem/protocol/GenericRequestType.hh" #include "mem/protocol/PrefetchBit.hh" #include "mem/protocol/RubyAccessMode.hh" @@ -47,8 +48,9 @@ CacheProfiler(const std::string& description); ~CacheProfiler(); - void printStats(std::ostream& out) const; - void clearStats(); + std::string name() { return "Ruby.CacheProfiler"; } + + void regStats(); void addCacheStatSample(RubyRequestType requestType, RubyAccessMode type, @@ -67,12 +69,12 @@ void addStatSample(RubyAccessMode type, PrefetchBit pfBit); std::string m_description; - int64 m_misses; - int64 m_demand_misses; - int64 m_prefetches; - int64 m_sw_prefetches; - int64 m_hw_prefetches; - int64 m_accessModeTypeHistogram[RubyAccessMode_NUM]; + Stats::Scalar m_misses; + Stats::Scalar m_demand_misses; + Stats::Scalar m_prefetches; + Stats::Scalar m_sw_prefetches; + Stats::Scalar m_hw_prefetches; + Stats::Scalar m_accessModeTypeCount[RubyAccessMode_NUM]; std::vector m_cacheRequestType; std::vector m_genericRequestType; diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/profiler/CacheProfiler.cc --- a/src/mem/ruby/profiler/CacheProfiler.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/profiler/CacheProfiler.cc Fri Sep 30 23:05:19 2011 -0400 @@ -26,6 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include #include "mem/ruby/profiler/CacheProfiler.hh" #include "mem/ruby/profiler/Profiler.hh" #include "mem/ruby/system/System.hh" @@ -37,7 +38,6 @@ { m_description = description; - clearStats(); } CacheProfiler::~CacheProfiler() @@ -45,86 +45,37 @@ } void -CacheProfiler::printStats(ostream& out) const +CacheProfiler::regStats() { - out << "Cache Stats: " << m_description << endl; - string description = " " + m_description; + std::stringstream name; + name << "ruby." << m_description; - out << description << "_total_misses: " << m_misses << endl; - out << description << "_total_demand_misses: " << m_demand_misses << endl; - out << description << "_total_prefetches: " << m_prefetches << endl; - out << description << "_total_sw_prefetches: " << m_sw_prefetches << endl; - out << description << "_total_hw_prefetches: " << m_hw_prefetches << endl; - out << endl; - - int requests = 0; - - for (int i = 0; i < int(RubyRequestType_NUM); i++) { - requests += m_cacheRequestType[i]; - } - - for (int i = 0; i < int(GenericRequestType_NUM); i++) { - requests += m_genericRequestType[i]; - } - - assert(m_misses == requests); - - if (requests > 0) { - for (int i = 0; i < int(RubyRequestType_NUM); i++) { - if (m_cacheRequestType[i] > 0) { - out << description << "_request_type_" - << RubyRequestType_to_string(RubyRequestType(i)) - << ": " - << 100.0 * (double)m_cacheRequestType[i] / - (double)requests - << "%" << endl; - } - } - - for (int i = 0; i < int(GenericRequestType_NUM); i++) { - if (m_genericRequestType[i] > 0) { - out << description << "_request_type_" - << GenericRequestType_to_string(GenericRequestType(i)) - << ": " - << 100.0 * (double)m_genericRequestType[i] / - (double)requests - << "%" << endl; - } - } - - out << endl; - - for (int i = 0; i < RubyAccessMode_NUM; i++){ - if (m_accessModeTypeHistogram[i] > 0) { - out << description << "_access_mode_type_" - << (RubyAccessMode) i << ": " - << m_accessModeTypeHistogram[i] << " " - << 100.0 * m_accessModeTypeHistogram[i] / requests - << "%" << endl; - } - } - } - - out << endl; -} - -void -CacheProfiler::clearStats() -{ - for (int i = 0; i < int(RubyRequestType_NUM); i++) { - m_cacheRequestType[i] = 0; - } - for (int i = 0; i < int(GenericRequestType_NUM); i++) { - m_genericRequestType[i] = 0; - } - m_misses = 0; - m_demand_misses = 0; - m_prefetches = 0; - m_sw_prefetches = 0; - m_hw_prefetches = 0; - for (int i = 0; i < RubyAccessMode_NUM; i++) { - m_accessModeTypeHistogram[i] = 0; - } + m_misses + .name(name.str() + ".total_misses") + .desc("Total number of cache misses") + ; + m_demand_misses + .name(name.str() + ".demand_misses") + .desc("Number of demand cache misses") + ; + m_prefetches + .name(name.str() + ".prefetches") + .desc("Number of cache prefetch requests") + ; + m_sw_prefetches + .name(name.str() + ".sw_prefetches") + .desc("Number of cache software prefetch requests") + ; + m_hw_prefetches + .name(name.str() + ".hw_prefetches") + .desc("Number of cache hardware prefetch requests") + ; + for(int i=0; i #include +#include "base/statistics.hh" #include "mem/ruby/common/Global.hh" class MemCntrlProfiler @@ -42,8 +43,9 @@ int ranks_per_dimm, int dimms_per_channel); ~MemCntrlProfiler(); - void printStats(std::ostream& out) const; - void clearStats(); + std::string name() { return m_description; } + + void regStats(); void profileMemReq(int bank); void profileMemBankBusy(); @@ -69,22 +71,25 @@ MemCntrlProfiler& operator=(const MemCntrlProfiler& obj); std::string m_description; - uint64 m_memReq; - uint64 m_memBankBusy; - uint64 m_memBusBusy; - uint64 m_memTfawBusy; - uint64 m_memReadWriteBusy; - uint64 m_memDataBusBusy; - uint64 m_memRefresh; - uint64 m_memRead; - uint64 m_memWrite; - uint64 m_memWaitCycles; - uint64 m_memInputQ; - uint64 m_memBankQ; - uint64 m_memArbWait; - uint64 m_memRandBusy; - uint64 m_memNotOld; - std::vector m_memBankCount; + Stats::Scalar m_memReq; + Stats::Scalar m_memBankBusy; + Stats::Scalar m_memBusBusy; + Stats::Scalar m_memTfawBusy; + Stats::Scalar m_memReadWriteBusy; + Stats::Scalar m_memDataBusBusy; + Stats::Scalar m_memRefresh; + Stats::Scalar m_memRead; + Stats::Scalar m_memWrite; + Stats::Scalar m_memWaitCycles; + Stats::Scalar m_memInputQ; + Stats::Scalar m_memBankQ; + Stats::Scalar m_memArbWait; + Stats::Scalar m_memRandBusy; + Stats::Scalar m_memNotOld; + Stats::Vector m_memBankCount; + Stats::Formula m_memTotalStalls; + Stats::Formula m_memStallsPerRequest; + int m_banks_per_rank; int m_ranks_per_dimm; int m_dimms_per_channel; diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/profiler/MemCntrlProfiler.cc --- a/src/mem/ruby/profiler/MemCntrlProfiler.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/profiler/MemCntrlProfiler.cc Fri Sep 30 23:05:19 2011 -0400 @@ -37,11 +37,6 @@ m_banks_per_rank = banks_per_rank; m_ranks_per_dimm = ranks_per_dimm; m_dimms_per_channel = dimms_per_channel; - - int totalBanks = banks_per_rank * ranks_per_dimm * dimms_per_channel; - m_memBankCount.resize(totalBanks); - - clearStats(); } MemCntrlProfiler::~MemCntrlProfiler() @@ -49,84 +44,88 @@ } void -MemCntrlProfiler::printStats(ostream& out) const +MemCntrlProfiler::regStats() { - if (!m_memReq && !m_memRefresh) { - out << "Memory Controller: " << m_description - << " no stats recorded." << endl - << endl - << endl; - return; - } + m_memReq + .name(name() + ".requests") + .desc("The number of requests made to this controller") + ; + m_memBankBusy + .name(name() + ".bankBusy") + .desc("The number of cycles this controller stalled because a bank was busy") + ; + m_memBusBusy + .name(name() + ".busBusy") + .desc("The number of cycles this controller stalled because a bus was busy") + ; + m_memTfawBusy + .name(name() + ".tfawBusy") + .desc("The number of cycles this controller stalled because a tfaw was busy") + ; + m_memReadWriteBusy + .name(name() + ".readWriteBusy") + .desc("The number of cycles this controller stalled because of a read-write turnaround") + ; + m_memDataBusBusy + .name(name() + ".dataBusBusy") + .desc("The number of cycles this controller stalled because of a read-read turnaround") + ; + m_memRefresh + .name(name() + ".refreshes") + .desc("The number of refreshes performed") + ; + m_memRead + .name(name() + ".reads") + .desc("The number of reads requested") + ; + m_memWrite + .name(name() + ".writes") + .desc("The number of writes requested") + ; + m_memWaitCycles + .name(name() + ".waitCycles") + .desc("The number cycles spent waiting. Represents the aggregate of *Busy stats.") + ; + m_memInputQ + .name(name() + ".inputQDelays") + .desc("The number cycles delayed on an input queue.") + ; + m_memBankQ + .name(name() + ".bankQDelays") + .desc("The number cycles delayed on a bank queue.") + ; + m_memArbWait + .name(name() + ".arbWait") + .desc("The number of stalls for arbitration.") + ; + m_memRandBusy + .name(name() + ".randBusy") + .desc("The number of stalls for random busy.") + ; + m_memNotOld + .name(name() + ".notOld") + .desc("The number of stalls for anti-starvation.") + ; - // if there's a memory controller at all - uint64 total_stalls = m_memInputQ + m_memBankQ + m_memWaitCycles; - double stallsPerReq = total_stalls * 1.0 / m_memReq; - out << "Memory controller: " << m_description << ":" << endl; + int totalBanks = m_banks_per_rank * m_ranks_per_dimm * m_dimms_per_channel; + m_memBankCount + .init(totalBanks) + .name(name() + ".bankAccessCount") + .desc("The number of times a bank is accessed") + ; - // does not include refreshes - out << " memory_total_requests: " << m_memReq << endl; - out << " memory_reads: " << m_memRead << endl; - out << " memory_writes: " << m_memWrite << endl; - out << " memory_refreshes: " << m_memRefresh << endl; - out << " memory_total_request_delays: " << total_stalls << endl; - out << " memory_delays_per_request: " << stallsPerReq << endl; - out << " memory_delays_in_input_queue: " << m_memInputQ << endl; - out << " memory_delays_behind_head_of_bank_queue: " - << m_memBankQ << endl; - out << " memory_delays_stalled_at_head_of_bank_queue: " - << m_memWaitCycles << endl; + m_memTotalStalls = m_memInputQ + m_memBankQ + m_memWaitCycles; + m_memTotalStalls + .name(name() + ".totalStalls") + .desc("The total number of stalls") + ; - // Note: The following "memory stalls" entries are a breakdown of - // the cycles which already showed up in m_memWaitCycles. The - // order is significant; it is the priority of attributing the - // cycles. For example, bank_busy is before arbitration because - // if the bank was busy, we didn't even check arbitration. - // Note: "not old enough" means that since we grouped waiting - // heads-of-queues into batches to avoid starvation, a request in - // a newer batch didn't try to arbitrate yet because there are - // older requests waiting. - out << " memory_stalls_for_bank_busy: " << m_memBankBusy << endl; - out << " memory_stalls_for_random_busy: " << m_memRandBusy << endl; - out << " memory_stalls_for_anti_starvation: " << m_memNotOld << endl; - out << " memory_stalls_for_arbitration: " << m_memArbWait << endl; - out << " memory_stalls_for_bus: " << m_memBusBusy << endl; - out << " memory_stalls_for_tfaw: " << m_memTfawBusy << endl; - out << " memory_stalls_for_read_write_turnaround: " - << m_memReadWriteBusy << endl; - out << " memory_stalls_for_read_read_turnaround: " - << m_memDataBusBusy << endl; - out << " accesses_per_bank: "; + m_memStallsPerRequest = (m_memInputQ + m_memBankQ + m_memWaitCycles) * 1.0 / m_memReq; + m_memStallsPerRequest + .name(name() + ".stallsPerRequest") + .desc("The average number of stalls per request") + ; - for (int bank = 0; bank < m_memBankCount.size(); bank++) { - out << m_memBankCount[bank] << " "; - } - out << endl; - out << endl; -} - -void -MemCntrlProfiler::clearStats() -{ - m_memReq = 0; - m_memBankBusy = 0; - m_memBusBusy = 0; - m_memTfawBusy = 0; - m_memReadWriteBusy = 0; - m_memDataBusBusy = 0; - m_memRefresh = 0; - m_memRead = 0; - m_memWrite = 0; - m_memWaitCycles = 0; - m_memInputQ = 0; - m_memBankQ = 0; - m_memArbWait = 0; - m_memRandBusy = 0; - m_memNotOld = 0; - - for (int bank = 0; bank < m_memBankCount.size(); bank++) { - m_memBankCount[bank] = 0; - } } void diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/profiler/Profiler.hh --- a/src/mem/ruby/profiler/Profiler.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/profiler/Profiler.hh Fri Sep 30 23:05:19 2011 -0400 @@ -51,6 +51,7 @@ #include #include "base/hashmap.hh" +#include "base/statistics.hh" #include "mem/protocol/AccessType.hh" #include "mem/protocol/GenericMachineType.hh" #include "mem/protocol/GenericRequestType.hh" @@ -78,27 +79,20 @@ Profiler(const Params *); ~Profiler(); + void regStats(); + std::string name() { return "RubyProfiler"; } + void wakeup(); void setPeriodicStatsFile(const std::string& filename); void setPeriodicStatsInterval(integer_t period); - void printStats(std::ostream& out, bool short_stats=false); - void printShortStats(std::ostream& out) { printStats(out, true); } - void printTraceStats(std::ostream& out) const; - void clearStats(); - void printConfig(std::ostream& out) const; - void printResourceUsage(std::ostream& out) const; - AddressProfiler* getAddressProfiler() { return m_address_profiler_ptr; } AddressProfiler* getInstructionProfiler() { return m_inst_profiler_ptr; } void addAddressTraceSample(const RubyRequest& msg, NodeID id); void profileRequest(const std::string& requestStr); - void profileSharing(const Address& addr, AccessType type, - NodeID requestor, const Set& sharers, - const Set& owner); void profileMulticastRetry(const Address& addr, int count); @@ -109,26 +103,19 @@ void profileOutstandingRequest(int outstanding) { - m_outstanding_requests.add(outstanding); + m_outstanding_requests.sample(outstanding); } void profileOutstandingPersistentRequest(int outstanding) { - m_outstanding_persistent_requests.add(outstanding); - } - - void - profileAverageLatencyEstimate(int latency) - { - m_average_latency_estimate.add(latency); + m_outstanding_persistent_requests.sample(outstanding); } void recordPrediction(bool wasGood, bool wasPredicted); void startTransaction(int cpu); void endTransaction(int cpu); - void profilePFWait(Time waitTime); void controllerBusy(MachineID machID); void bankBusy(); @@ -148,12 +135,6 @@ Time forwardRequestTime, Time firstResponseTime, Time completionTime); - - void swPrefetchLatency(Time t, - RubyRequestType type, - const GenericMachineType respondingMach); - - void sequencerRequests(int num) { m_sequencer_requests.add(num); } void profileMsgDelay(int virtualNetwork, int delayCycles); @@ -190,51 +171,27 @@ Time m_ruby_start; time_t m_real_time_start_time; - std::vector > m_busyControllerCount; - integer_t m_busyBankCount; - Histogram m_multicast_retry_histogram; + unsigned profilerBucketSize; - Histogram m_filter_action_histogram; - Histogram m_tbeProfile; + Stats::Histogram m_wCCIssueToInitialRequestHistogram; + Stats::Histogram m_wCCInitialRequestToForwardRequestHistogram; + Stats::Histogram m_wCCForwardRequestToFirstResponseHistogram; + Stats::Histogram m_wCCFirstResponseToCompleteHistogram; + Stats::Scalar m_wCCIncompleteTimes; - Histogram m_sequencer_requests; - Histogram m_read_sharing_histogram; - Histogram m_write_sharing_histogram; - Histogram m_all_sharing_histogram; - int64 m_cache_to_cache; - int64 m_memory_to_cache; + Stats::Histogram m_dirIssueToInitialRequestHistogram; + Stats::Histogram m_dirInitialRequestToForwardRequestHistogram; + Stats::Histogram m_dirForwardRequestToFirstResponseHistogram; + Stats::Histogram m_dirFirstResponseToCompleteHistogram; + Stats::Scalar m_dirIncompleteTimes; - Histogram m_prefetchWaitHistogram; + Stats::Histogram m_delayedCyclesHistogram; + Stats::Histogram m_delayedCyclesNonPFHistogram; + //@todo: redo Stats Vector + std::vector m_delayedCyclesVCHistograms; - std::vector m_missLatencyHistograms; - std::vector m_machLatencyHistograms; - std::vector< std::vector > m_missMachLatencyHistograms; - Histogram m_wCCIssueToInitialRequestHistogram; - Histogram m_wCCInitialRequestToForwardRequestHistogram; - Histogram m_wCCForwardRequestToFirstResponseHistogram; - Histogram m_wCCFirstResponseToCompleteHistogram; - int64 m_wCCIncompleteTimes; - Histogram m_dirIssueToInitialRequestHistogram; - Histogram m_dirInitialRequestToForwardRequestHistogram; - Histogram m_dirForwardRequestToFirstResponseHistogram; - Histogram m_dirFirstResponseToCompleteHistogram; - int64 m_dirIncompleteTimes; - - Histogram m_allMissLatencyHistogram; - - Histogram m_allSWPrefetchLatencyHistogram; - Histogram m_SWPrefetchL2MissLatencyHistogram; - std::vector m_SWPrefetchLatencyHistograms; - std::vector m_SWPrefetchMachLatencyHistograms; - - Histogram m_delayedCyclesHistogram; - Histogram m_delayedCyclesNonPFHistogram; - std::vector m_delayedCyclesVCHistograms; - - Histogram m_outstanding_requests; - Histogram m_outstanding_persistent_requests; - - Histogram m_average_latency_estimate; + Stats::Histogram m_outstanding_requests; + Stats::Histogram m_outstanding_persistent_requests; m5::hash_set
m_watch_address_set; // counts all initiated cache request including PUTs diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/profiler/Profiler.cc --- a/src/mem/ruby/profiler/Profiler.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/profiler/Profiler.cc Fri Sep 30 23:05:19 2011 -0400 @@ -67,6 +67,8 @@ Profiler::Profiler(const Params *p) : SimObject(p) { + profilerBucketSize = 200; + m_inst_profiler_ptr = NULL; m_address_profiler_ptr = NULL; @@ -126,8 +128,6 @@ << process_memory_resident() / process_memory_total() << endl; } - out << "miss_latency: " << m_allMissLatencyHistogram << endl; - out << endl; if (m_all_instructions) { @@ -163,375 +163,99 @@ } void -Profiler::printConfig(ostream& out) const -{ - out << endl; - out << "Profiler Configuration" << endl; - out << "----------------------" << endl; - out << "periodic_stats_period: " << m_stats_period << endl; -} - -void Profiler::print(ostream& out) const { out << "[Profiler]"; } void -Profiler::printStats(ostream& out, bool short_stats) +Profiler::regStats() { - out << endl; - if (short_stats) { - out << "SHORT "; - } - out << "Profiler Stats" << endl; - out << "--------------" << endl; + m_wCCIssueToInitialRequestHistogram + .init(profilerBucketSize) + .name(name() + ".wCCIssueToInitialRequestHistogram") + .desc("I-IR Coherence Histogram") + ; + m_wCCInitialRequestToForwardRequestHistogram + .init(profilerBucketSize) + .name(name() + ".wCCInitialRequestToForwardRequestHistogram") + .desc("IR-F Coherence Histogram") + ; + m_wCCForwardRequestToFirstResponseHistogram + .init(profilerBucketSize) + .name(name() + ".wCCForwardRequestToFirstResponseHistogram") + .desc("F-FR Coherence Histogram") + ; + m_wCCFirstResponseToCompleteHistogram + .init(profilerBucketSize) + .name(name() + ".wCCFirstResponseToCompleteHistogram") + .desc("FR-C Coherence Histogram") + ; + m_wCCIncompleteTimes + .name(name() + ".wCCIncompleteTimes") + .desc("Inc Coherence Histogram") + ; - time_t real_time_current = time(NULL); - double seconds = difftime(real_time_current, m_real_time_start_time); - double minutes = seconds / 60.0; - double hours = minutes / 60.0; - double days = hours / 24.0; - Time ruby_cycles = g_eventQueue_ptr->getTime()-m_ruby_start; + m_dirIssueToInitialRequestHistogram + .init(profilerBucketSize) + .name(name() + ".dirIssueToInitialRequestHistogram") + .desc("I-IR Coherence Histogram") + ; + m_dirInitialRequestToForwardRequestHistogram + .init(profilerBucketSize) + .name(name() + ".dirInitialRequestToForwardRequestHistogram") + .desc("IR-F Coherence Histogram") + ; + m_dirForwardRequestToFirstResponseHistogram + .init(profilerBucketSize) + .name(name() + ".dirForwardRequestToFirstResponseHistogram") + .desc("F-FR Coherence Histogram") + ; + m_dirFirstResponseToCompleteHistogram + .init(profilerBucketSize) + .name(name() + ".dirFirstResponseToCompleteHistogram") + .desc("FR-C Coherence Histogram") + ; + m_dirIncompleteTimes + .name(name() + ".dirIncompleteTimes") + .desc("Inc Coherence Histogram") + ; - if (!short_stats) { - out << "Elapsed_time_in_seconds: " << seconds << endl; - out << "Elapsed_time_in_minutes: " << minutes << endl; - out << "Elapsed_time_in_hours: " << hours << endl; - out << "Elapsed_time_in_days: " << days << endl; - out << endl; - } - - // print the virtual runtimes as well - struct tms vtime; - times(&vtime); - seconds = (vtime.tms_utime + vtime.tms_stime) / 100.0; - minutes = seconds / 60.0; - hours = minutes / 60.0; - days = hours / 24.0; - out << "Virtual_time_in_seconds: " << seconds << endl; - out << "Virtual_time_in_minutes: " << minutes << endl; - out << "Virtual_time_in_hours: " << hours << endl; - out << "Virtual_time_in_days: " << days << endl; - out << endl; - - out << "Ruby_current_time: " << g_eventQueue_ptr->getTime() << endl; - out << "Ruby_start_time: " << m_ruby_start << endl; - out << "Ruby_cycles: " << ruby_cycles << endl; - out << endl; - - if (!short_stats) { - out << "mbytes_resident: " << process_memory_resident() << endl; - out << "mbytes_total: " << process_memory_total() << endl; - if (process_memory_total() > 0) { - out << "resident_ratio: " - << process_memory_resident()/process_memory_total() << endl; - } - out << endl; - } - - vector perProcCycleCount(m_num_of_sequencers); - - for (int i = 0; i < m_num_of_sequencers; i++) { - perProcCycleCount[i] = - g_system_ptr->getCycleCount(i) - m_cycles_executed_at_start[i] + 1; - // The +1 allows us to avoid division by zero - } - - out << "ruby_cycles_executed: " << perProcCycleCount << endl; - - out << endl; - - if (!short_stats) { - out << "Busy Controller Counts:" << endl; - for (int i = 0; i < MachineType_NUM; i++) { - int size = MachineType_base_count((MachineType)i); - for (int j = 0; j < size; j++) { - MachineID machID; - machID.type = (MachineType)i; - machID.num = j; - out << machID << ":" << m_busyControllerCount[i][j] << " "; - if ((j + 1) % 8 == 0) { - out << endl; - } - } - out << endl; - } - out << endl; - - out << "Busy Bank Count:" << m_busyBankCount << endl; - out << endl; - - out << "sequencer_requests_outstanding: " - << m_sequencer_requests << endl; - out << endl; - } - - if (!short_stats) { - out << "All Non-Zero Cycle Demand Cache Accesses" << endl; - out << "----------------------------------------" << endl; - out << "miss_latency: " << m_allMissLatencyHistogram << endl; - for (int i = 0; i < m_missLatencyHistograms.size(); i++) { - if (m_missLatencyHistograms[i].size() > 0) { - out << "miss_latency_" << RubyRequestType(i) << ": " - << m_missLatencyHistograms[i] << endl; - } - } - for (int i = 0; i < m_machLatencyHistograms.size(); i++) { - if (m_machLatencyHistograms[i].size() > 0) { - out << "miss_latency_" << GenericMachineType(i) << ": " - << m_machLatencyHistograms[i] << endl; - } - } - - out << "miss_latency_wCC_issue_to_initial_request: " - << m_wCCIssueToInitialRequestHistogram << endl; - out << "miss_latency_wCC_initial_forward_request: " - << m_wCCInitialRequestToForwardRequestHistogram << endl; - out << "miss_latency_wCC_forward_to_first_response: " - << m_wCCForwardRequestToFirstResponseHistogram << endl; - out << "miss_latency_wCC_first_response_to_completion: " - << m_wCCFirstResponseToCompleteHistogram << endl; - out << "imcomplete_wCC_Times: " << m_wCCIncompleteTimes << endl; - out << "miss_latency_dir_issue_to_initial_request: " - << m_dirIssueToInitialRequestHistogram << endl; - out << "miss_latency_dir_initial_forward_request: " - << m_dirInitialRequestToForwardRequestHistogram << endl; - out << "miss_latency_dir_forward_to_first_response: " - << m_dirForwardRequestToFirstResponseHistogram << endl; - out << "miss_latency_dir_first_response_to_completion: " - << m_dirFirstResponseToCompleteHistogram << endl; - out << "imcomplete_dir_Times: " << m_dirIncompleteTimes << endl; - - for (int i = 0; i < m_missMachLatencyHistograms.size(); i++) { - for (int j = 0; j < m_missMachLatencyHistograms[i].size(); j++) { - if (m_missMachLatencyHistograms[i][j].size() > 0) { - out << "miss_latency_" << RubyRequestType(i) - << "_" << GenericMachineType(j) << ": " - << m_missMachLatencyHistograms[i][j] << endl; - } - } - } - - out << endl; - - out << "All Non-Zero Cycle SW Prefetch Requests" << endl; - out << "------------------------------------" << endl; - out << "prefetch_latency: " << m_allSWPrefetchLatencyHistogram << endl; - for (int i = 0; i < m_SWPrefetchLatencyHistograms.size(); i++) { - if (m_SWPrefetchLatencyHistograms[i].size() > 0) { - out << "prefetch_latency_" << RubyRequestType(i) << ": " - << m_SWPrefetchLatencyHistograms[i] << endl; - } - } - for (int i = 0; i < m_SWPrefetchMachLatencyHistograms.size(); i++) { - if (m_SWPrefetchMachLatencyHistograms[i].size() > 0) { - out << "prefetch_latency_" << GenericMachineType(i) << ": " - << m_SWPrefetchMachLatencyHistograms[i] << endl; - } - } - out << "prefetch_latency_L2Miss:" - << m_SWPrefetchL2MissLatencyHistogram << endl; - - if (m_all_sharing_histogram.size() > 0) { - out << "all_sharing: " << m_all_sharing_histogram << endl; - out << "read_sharing: " << m_read_sharing_histogram << endl; - out << "write_sharing: " << m_write_sharing_histogram << endl; - - out << "all_sharing_percent: "; - m_all_sharing_histogram.printPercent(out); - out << endl; - - out << "read_sharing_percent: "; - m_read_sharing_histogram.printPercent(out); - out << endl; - - out << "write_sharing_percent: "; - m_write_sharing_histogram.printPercent(out); - out << endl; - - int64 total_miss = m_cache_to_cache + m_memory_to_cache; - out << "all_misses: " << total_miss << endl; - out << "cache_to_cache_misses: " << m_cache_to_cache << endl; - out << "memory_to_cache_misses: " << m_memory_to_cache << endl; - out << "cache_to_cache_percent: " - << 100.0 * (double(m_cache_to_cache) / double(total_miss)) - << endl; - out << "memory_to_cache_percent: " - << 100.0 * (double(m_memory_to_cache) / double(total_miss)) - << endl; - out << endl; - } - - if (m_outstanding_requests.size() > 0) { - out << "outstanding_requests: "; - m_outstanding_requests.printPercent(out); - out << endl; - out << endl; - } - } - - if (!short_stats) { - out << "Request vs. RubySystem State Profile" << endl; - out << "--------------------------------" << endl; - out << endl; - - map::const_iterator i = m_requestProfileMap.begin(); - map::const_iterator end = m_requestProfileMap.end(); - for (; i != end; ++i) { - const string &key = i->first; - int count = i->second; - - double percent = (100.0 * double(count)) / double(m_requests); - vector items; - tokenize(items, key, ':'); - vector::iterator j = items.begin(); - vector::iterator end = items.end(); - for (; j != end; ++i) - out << setw(10) << *j; - out << setw(11) << count; - out << setw(14) << percent << endl; - } - out << endl; - - out << "filter_action: " << m_filter_action_histogram << endl; - - if (!m_all_instructions) { - m_address_profiler_ptr->printStats(out); - } - - if (m_all_instructions) { - m_inst_profiler_ptr->printStats(out); - } - - out << endl; - out << "Message Delayed Cycles" << endl; - out << "----------------------" << endl; - out << "Total_delay_cycles: " << m_delayedCyclesHistogram << endl; - out << "Total_nonPF_delay_cycles: " - << m_delayedCyclesNonPFHistogram << endl; - for (int i = 0; i < m_delayedCyclesVCHistograms.size(); i++) { - out << " virtual_network_" << i << "_delay_cycles: " - << m_delayedCyclesVCHistograms[i] << endl; - } - - printResourceUsage(out); - } -} - -void -Profiler::printResourceUsage(ostream& out) const -{ - out << endl; - out << "Resource Usage" << endl; - out << "--------------" << endl; - - integer_t pagesize = getpagesize(); // page size in bytes - out << "page_size: " << pagesize << endl; - - rusage usage; - getrusage (RUSAGE_SELF, &usage); - - out << "user_time: " << usage.ru_utime.tv_sec << endl; - out << "system_time: " << usage.ru_stime.tv_sec << endl; - out << "page_reclaims: " << usage.ru_minflt << endl; - out << "page_faults: " << usage.ru_majflt << endl; - out << "swaps: " << usage.ru_nswap << endl; - out << "block_inputs: " << usage.ru_inblock << endl; - out << "block_outputs: " << usage.ru_oublock << endl; -} - -void -Profiler::clearStats() -{ - m_ruby_start = g_eventQueue_ptr->getTime(); - - m_cycles_executed_at_start.resize(m_num_of_sequencers); - for (int i = 0; i < m_num_of_sequencers; i++) { - if (g_system_ptr == NULL) { - m_cycles_executed_at_start[i] = 0; - } else { - m_cycles_executed_at_start[i] = g_system_ptr->getCycleCount(i); - } - } - - m_busyControllerCount.resize(MachineType_NUM); // all machines - for (int i = 0; i < MachineType_NUM; i++) { - int size = MachineType_base_count((MachineType)i); - m_busyControllerCount[i].resize(size); - for (int j = 0; j < size; j++) { - m_busyControllerCount[i][j] = 0; - } - } - m_busyBankCount = 0; - - m_delayedCyclesHistogram.clear(); - m_delayedCyclesNonPFHistogram.clear(); + m_delayedCyclesHistogram + .init(profilerBucketSize) + .name(name() + ".delayedCyclesHistogram") + .desc("Request Delayed Cycles") + ; + m_delayedCyclesNonPFHistogram + .init(profilerBucketSize) + .name(name() + ".delayedCyclesNonPFHistogram") + .desc("Non-Prefetch Delayed Cycles") + ; int size = RubySystem::getNetwork()->getNumberOfVirtualNetworks(); m_delayedCyclesVCHistograms.resize(size); for (int i = 0; i < size; i++) { - m_delayedCyclesVCHistograms[i].clear(); + m_delayedCyclesVCHistograms[i] = new Stats::Histogram; + m_delayedCyclesVCHistograms[i] + ->init(profilerBucketSize) + .name(csprintf(name() + ".vc%02i.delayedCyclesHistogram", i)) + .desc("??") + ; } - m_missLatencyHistograms.resize(RubyRequestType_NUM); - for (int i = 0; i < m_missLatencyHistograms.size(); i++) { - m_missLatencyHistograms[i].clear(200); + m_outstanding_requests + .init(profilerBucketSize) + .name(name() + ".outstandingRequests") + .desc("Outstanding Requests") + ; + m_outstanding_persistent_requests + .init(profilerBucketSize) + .name(name() + ".outstandingPersistentRequests") + .desc("Persistent Requests") + ; + m_address_profiler_ptr->regStats(); + if (m_all_instructions) { + m_inst_profiler_ptr->regStats(); } - m_machLatencyHistograms.resize(GenericMachineType_NUM+1); - for (int i = 0; i < m_machLatencyHistograms.size(); i++) { - m_machLatencyHistograms[i].clear(200); - } - m_missMachLatencyHistograms.resize(RubyRequestType_NUM); - for (int i = 0; i < m_missLatencyHistograms.size(); i++) { - m_missMachLatencyHistograms[i].resize(GenericMachineType_NUM+1); - for (int j = 0; j < m_missMachLatencyHistograms[i].size(); j++) { - m_missMachLatencyHistograms[i][j].clear(200); - } - } - m_allMissLatencyHistogram.clear(200); - m_wCCIssueToInitialRequestHistogram.clear(200); - m_wCCInitialRequestToForwardRequestHistogram.clear(200); - m_wCCForwardRequestToFirstResponseHistogram.clear(200); - m_wCCFirstResponseToCompleteHistogram.clear(200); - m_wCCIncompleteTimes = 0; - m_dirIssueToInitialRequestHistogram.clear(200); - m_dirInitialRequestToForwardRequestHistogram.clear(200); - m_dirForwardRequestToFirstResponseHistogram.clear(200); - m_dirFirstResponseToCompleteHistogram.clear(200); - m_dirIncompleteTimes = 0; - - m_SWPrefetchLatencyHistograms.resize(RubyRequestType_NUM); - for (int i = 0; i < m_SWPrefetchLatencyHistograms.size(); i++) { - m_SWPrefetchLatencyHistograms[i].clear(200); - } - m_SWPrefetchMachLatencyHistograms.resize(GenericMachineType_NUM+1); - for (int i = 0; i < m_SWPrefetchMachLatencyHistograms.size(); i++) { - m_SWPrefetchMachLatencyHistograms[i].clear(200); - } - m_allSWPrefetchLatencyHistogram.clear(200); - - m_sequencer_requests.clear(); - m_read_sharing_histogram.clear(); - m_write_sharing_histogram.clear(); - m_all_sharing_histogram.clear(); - m_cache_to_cache = 0; - m_memory_to_cache = 0; - - // clear HashMaps - m_requestProfileMap.clear(); - - // count requests profiled - m_requests = 0; - - m_outstanding_requests.clear(); - m_outstanding_persistent_requests.clear(); - - // Flush the prefetches through the system - used so that there - // are no outstanding requests after stats are cleared - //g_eventQueue_ptr->triggerAllEvents(); - - // update the start time - m_ruby_start = g_eventQueue_ptr->getTime(); } void @@ -551,39 +275,13 @@ } void -Profiler::profileSharing(const Address& addr, AccessType type, - NodeID requestor, const Set& sharers, - const Set& owner) -{ - Set set_contacted(owner); - if (type == AccessType_Write) { - set_contacted.addSet(sharers); - } - set_contacted.remove(requestor); - int number_contacted = set_contacted.count(); - - if (type == AccessType_Write) { - m_write_sharing_histogram.add(number_contacted); - } else { - m_read_sharing_histogram.add(number_contacted); - } - m_all_sharing_histogram.add(number_contacted); - - if (number_contacted == 0) { - m_memory_to_cache++; - } else { - m_cache_to_cache++; - } -} - -void Profiler::profileMsgDelay(int virtualNetwork, int delayCycles) { assert(virtualNetwork < m_delayedCyclesVCHistograms.size()); - m_delayedCyclesHistogram.add(delayCycles); - m_delayedCyclesVCHistograms[virtualNetwork].add(delayCycles); + m_delayedCyclesHistogram.sample(delayCycles); + m_delayedCyclesVCHistograms[virtualNetwork]->sample(delayCycles); if (virtualNetwork != 0) { - m_delayedCyclesNonPFHistogram.add(delayCycles); + m_delayedCyclesNonPFHistogram.sample(delayCycles); } } @@ -599,36 +297,6 @@ } void -Profiler::controllerBusy(MachineID machID) -{ - m_busyControllerCount[(int)machID.type][(int)machID.num]++; -} - -void -Profiler::profilePFWait(Time waitTime) -{ - m_prefetchWaitHistogram.add(waitTime); -} - -void -Profiler::bankBusy() -{ - m_busyBankCount++; -} - -// non-zero cycle demand request -void -Profiler::missLatency(Time cycles, - RubyRequestType type, - const GenericMachineType respondingMach) -{ - m_allMissLatencyHistogram.add(cycles); - m_missLatencyHistograms[type].add(cycles); - m_machLatencyHistograms[respondingMach].add(cycles); - m_missMachLatencyHistograms[type][respondingMach].add(cycles); -} - -void Profiler::missLatencyWcc(Time issuedTime, Time initialRequestTime, Time forwardRequestTime, @@ -639,16 +307,16 @@ (initialRequestTime <= forwardRequestTime) && (forwardRequestTime <= firstResponseTime) && (firstResponseTime <= completionTime)) { - m_wCCIssueToInitialRequestHistogram.add(initialRequestTime - issuedTime); + m_wCCIssueToInitialRequestHistogram.sample(initialRequestTime - issuedTime); - m_wCCInitialRequestToForwardRequestHistogram.add(forwardRequestTime - - initialRequestTime); + m_wCCInitialRequestToForwardRequestHistogram.sample(forwardRequestTime - + initialRequestTime); - m_wCCForwardRequestToFirstResponseHistogram.add(firstResponseTime - - forwardRequestTime); + m_wCCForwardRequestToFirstResponseHistogram.sample(firstResponseTime - + forwardRequestTime); - m_wCCFirstResponseToCompleteHistogram.add(completionTime - - firstResponseTime); + m_wCCFirstResponseToCompleteHistogram.sample(completionTime - + firstResponseTime); } else { m_wCCIncompleteTimes++; } @@ -665,36 +333,21 @@ (initialRequestTime <= forwardRequestTime) && (forwardRequestTime <= firstResponseTime) && (firstResponseTime <= completionTime)) { - m_dirIssueToInitialRequestHistogram.add(initialRequestTime - issuedTime); + m_dirIssueToInitialRequestHistogram.sample(initialRequestTime - issuedTime); - m_dirInitialRequestToForwardRequestHistogram.add(forwardRequestTime - + m_dirInitialRequestToForwardRequestHistogram.sample(forwardRequestTime - initialRequestTime); - m_dirForwardRequestToFirstResponseHistogram.add(firstResponseTime - + m_dirForwardRequestToFirstResponseHistogram.sample(firstResponseTime - forwardRequestTime); - m_dirFirstResponseToCompleteHistogram.add(completionTime - + m_dirFirstResponseToCompleteHistogram.sample(completionTime - firstResponseTime); } else { m_dirIncompleteTimes++; } } -// non-zero cycle prefetch request -void -Profiler::swPrefetchLatency(Time cycles, - RubyRequestType type, - const GenericMachineType respondingMach) -{ - m_allSWPrefetchLatencyHistogram.add(cycles); - m_SWPrefetchLatencyHistograms[type].add(cycles); - m_SWPrefetchMachLatencyHistograms[respondingMach].add(cycles); - if (respondingMach == GenericMachineType_Directory || - respondingMach == GenericMachineType_NUM) { - m_SWPrefetchL2MissLatencyHistogram.add(cycles); - } -} - // Helper function static double process_memory_total() diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/recorder/Tracer.cc --- a/src/mem/ruby/recorder/Tracer.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/recorder/Tracer.cc Fri Sep 30 23:05:19 2011 -0400 @@ -107,7 +107,7 @@ if (counter == m_warmup_length) { cprintf("Clearing stats after warmup of length %s\n", m_warmup_length); - g_system_ptr->clearStats(); + assert(0 && "Must Add Code to clear stats or reset trace here"); } } diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/slicc_interface/AbstractController.hh --- a/src/mem/ruby/slicc_interface/AbstractController.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/slicc_interface/AbstractController.hh Fri Sep 30 23:05:19 2011 -0400 @@ -45,6 +45,8 @@ class MessageBuffer; class Network; +//@todo: maybe change to BaseController since adding m_name and name() +// no longer makes it pure virtual? class AbstractController : public SimObject, public Consumer { public: @@ -67,11 +69,12 @@ virtual DataBlock& getDataBlock(const Address& addr) = 0; virtual void print(std::ostream & out) const = 0; - virtual void printStats(std::ostream & out) const = 0; virtual void printConfig(std::ostream & out) const = 0; virtual void wakeup() = 0; // virtual void dumpStats(std::ostream & out) = 0; - virtual void clearStats() = 0; + + std::string m_name; + std::string name() { return m_name; }; }; #endif // __MEM_RUBY_SLICC_INTERFACE_ABSTRACTCONTROLLER_HH__ diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh --- a/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh Fri Sep 30 23:05:19 2011 -0400 @@ -45,8 +45,6 @@ void profile_outstanding_persistent_request(int outstanding); void profile_outstanding_request(int outstanding); -void profile_sharing(const Address& addr, AccessType type, NodeID requestor, - const Set& sharers, const Set& owner); void profile_request(const std::string& L1CacheStateStr, const std::string& L2CacheStateStr, const std::string& directoryStateStr, @@ -56,7 +54,6 @@ void profile_token_retry(const Address& addr, AccessType type, int count); void profile_filter_action(int action); void profile_persistent_prediction(const Address& addr, AccessType type); -void profile_average_latency_estimate(int latency); void profileMsgDelay(int virtualNetwork, int delayCycles); void profile_multicast_retry(const Address& addr, int count); diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc --- a/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc Fri Sep 30 23:05:19 2011 -0400 @@ -52,20 +52,6 @@ } void -profile_average_latency_estimate(int latency) -{ - g_system_ptr->getProfiler()->profileAverageLatencyEstimate(latency); -} - -void -profile_sharing(const Address& addr, AccessType type, NodeID requestor, - const Set& sharers, const Set& owner) -{ - g_system_ptr->getProfiler()-> - profileSharing(addr, type, requestor, sharers, owner); -} - -void profileMsgDelay(int virtualNetwork, int delayCycles) { g_system_ptr->getProfiler()->profileMsgDelay(virtualNetwork, delayCycles); diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/system/CacheMemory.hh --- a/src/mem/ruby/system/CacheMemory.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/system/CacheMemory.hh Fri Sep 30 23:05:19 2011 -0400 @@ -123,9 +123,6 @@ void print(std::ostream& out) const; void printData(std::ostream& out) const; - void clearStats() const; - void printStats(std::ostream& out) const; - private: // convert a Address to its location in the cache Index addressToCacheSet(const Address& address) const; diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/system/CacheMemory.cc --- a/src/mem/ruby/system/CacheMemory.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/system/CacheMemory.cc Fri Sep 30 23:05:19 2011 -0400 @@ -416,18 +416,6 @@ } void -CacheMemory::clearStats() const -{ - m_profiler_ptr->clearStats(); -} - -void -CacheMemory::printStats(ostream& out) const -{ - m_profiler_ptr->printStats(out); -} - -void CacheMemory::setLocked(const Address& address, int context) { DPRINTF(RubyCache, "Setting Lock for addr: %x to %d\n", address, context); diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/system/MemoryControl.hh --- a/src/mem/ruby/system/MemoryControl.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/system/MemoryControl.hh Fri Sep 30 23:05:19 2011 -0400 @@ -84,8 +84,6 @@ void printConfig(std::ostream& out); void print(std::ostream& out) const; - void clearStats() const; - void printStats(std::ostream& out) const; //added by SS int getBanksPerRank() { return m_banks_per_rank; }; diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/system/MemoryControl.cc --- a/src/mem/ruby/system/MemoryControl.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/system/MemoryControl.cc Fri Sep 30 23:05:19 2011 -0400 @@ -345,18 +345,6 @@ out << " Arbitration randomness: " << m_mem_random_arbitrate << endl; } -void -MemoryControl::clearStats() const -{ - m_profiler_ptr->clearStats(); -} - -void -MemoryControl::printStats(ostream& out) const -{ - m_profiler_ptr->printStats(out); -} - // Queue up a completed request to send back to directory void MemoryControl::enqueueToDirectory(MemoryNode req, int latency) diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/system/Sequencer.hh --- a/src/mem/ruby/system/Sequencer.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/system/Sequencer.hh Fri Sep 30 23:05:19 2011 -0400 @@ -32,6 +32,7 @@ #include #include "base/hashmap.hh" +#include "base/statistics.hh" #include "mem/protocol/GenericMachineType.hh" #include "mem/protocol/PrefetchBit.hh" #include "mem/protocol/RubyAccessMode.hh" @@ -105,6 +106,7 @@ bool empty() const; void print(std::ostream& out) const; + void regStats(); void printStats(std::ostream& out) const; void checkCoherence(const Address& address); @@ -144,10 +146,10 @@ int m_outstanding_count; bool m_deadlock_check_scheduled; - int m_store_waiting_on_load_cycles; - int m_store_waiting_on_store_cycles; - int m_load_waiting_on_store_cycles; - int m_load_waiting_on_load_cycles; + Stats::Scalar m_store_waiting_on_load_cycles; + Stats::Scalar m_store_waiting_on_store_cycles; + Stats::Scalar m_load_waiting_on_store_cycles; + Stats::Scalar m_load_waiting_on_load_cycles; bool m_usingNetworkTester; @@ -163,6 +165,15 @@ }; SequencerWakeupEvent deadlockCheckEvent; + + // Statistics + unsigned statBucketSize; + Stats::Histogram m_requests_hist; + //@todo::Stats Vector??? + std::vector< Stats::Histogram* > m_miss_latency_by_request_type_hist; + std::vector< Stats::Histogram* > m_miss_latency_by_mach_type_hist; + std::vector< std::vector< Stats::Histogram* > > m_miss_latency_by_request_and_mach_type_hist; + Stats::Histogram m_miss_latency_hist; }; inline std::ostream& diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/system/Sequencer.cc --- a/src/mem/ruby/system/Sequencer.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/system/Sequencer.cc Fri Sep 30 23:05:19 2011 -0400 @@ -55,6 +55,8 @@ Sequencer::Sequencer(const Params *p) : RubyPort(p), deadlockCheckEvent(this) { + statBucketSize = 200; + m_store_waiting_on_load_cycles = 0; m_store_waiting_on_store_cycles = 0; m_load_waiting_on_store_cycles = 0; @@ -137,17 +139,76 @@ } void +Sequencer::regStats() +{ + stringstream name; + name << "ruby.sequencer" << m_version; + m_requests_hist + .init(statBucketSize) + .name(name.str() + ".outstandingRequests") + .desc("Histogram of the number of outstanding requests per cycle") + ; + + m_miss_latency_by_request_type_hist.resize(RubyRequestType_NUM); + for (int i = 0; i < m_miss_latency_by_request_type_hist.size(); i++) { + m_miss_latency_by_request_type_hist[i] = new Stats::Histogram; + m_miss_latency_by_request_type_hist[i] + ->init(statBucketSize) + .name(name.str() + "." + RubyRequestType_to_string((RubyRequestType)i) + ".reqMissLatency") + .desc("Histogram of miss latencies for this request type") + ; + } + m_miss_latency_by_mach_type_hist.resize(GenericMachineType_NUM); + for (int i = 0; i < m_miss_latency_by_mach_type_hist.size(); i++) { + m_miss_latency_by_mach_type_hist[i] = new Stats::Histogram; + m_miss_latency_by_mach_type_hist[i] + ->init(statBucketSize) + .name(name.str() + "." + GenericMachineType_to_string((GenericMachineType)i) + ".machMissLatency") + .desc("Histogram of miss latencies for this machine type") + ; + } + m_miss_latency_by_request_and_mach_type_hist.resize(RubyRequestType_NUM); + for (int i = 0; i < m_miss_latency_by_request_and_mach_type_hist.size(); i++) { + m_miss_latency_by_request_and_mach_type_hist[i].resize(GenericMachineType_NUM); + for (int j = 0; j < m_miss_latency_by_request_and_mach_type_hist[i].size(); j++) { + m_miss_latency_by_request_and_mach_type_hist[i][j] = new Stats::Histogram; + + m_miss_latency_by_request_and_mach_type_hist[i][j] + ->init(statBucketSize) + .name(name.str() + + "." + GenericMachineType_to_string((GenericMachineType)j) + + "." + RubyRequestType_to_string((RubyRequestType)i) + + ".missLatency") + .desc("Histogram of miss latencies") + ; + } + } + m_miss_latency_hist + .init(statBucketSize) + .name(name.str() + ".missLatency") + .desc("Histogram of miss latencies") + ; + m_store_waiting_on_load_cycles + .name(name.str() + ".store_waiting_on_load_cycles") + .desc("Number of cycles a store spent waiting on a load") + ; + m_store_waiting_on_store_cycles + .name(name.str() + ".store_waiting_on_store_cycles") + .desc("Number of cycles a store spent waiting on a store") + ; + m_load_waiting_on_load_cycles + .name(name.str() + ".load_waiting_on_load_cycles") + .desc("Number of cycles a load spent waiting on a load") + ; + m_load_waiting_on_store_cycles + .name(name.str() + ".load_waiting_on_store_cycles") + .desc("Number of cycles a load spent waiting on a store") + ; +} + +void Sequencer::printStats(ostream & out) const { - out << "Sequencer: " << m_name << endl - << " store_waiting_on_load_cycles: " - << m_store_waiting_on_load_cycles << endl - << " store_waiting_on_store_cycles: " - << m_store_waiting_on_store_cycles << endl - << " load_waiting_on_load_cycles: " - << m_load_waiting_on_load_cycles << endl - << " load_waiting_on_store_cycles: " - << m_load_waiting_on_store_cycles << endl; } void @@ -266,7 +327,7 @@ m_outstanding_count++; } - g_system_ptr->getProfiler()->sequencerRequests(m_outstanding_count); + m_requests_hist.sample(m_outstanding_count); total_outstanding = m_writeRequestTable.size() + m_readRequestTable.size(); assert(m_outstanding_count == total_outstanding); @@ -481,7 +542,11 @@ // Profile the miss latency for all non-zero demand misses if (miss_latency != 0) { - g_system_ptr->getProfiler()->missLatency(miss_latency, type, mach); + + m_miss_latency_by_request_type_hist[type]->sample(miss_latency); + m_miss_latency_by_mach_type_hist[mach]->sample(miss_latency); + m_miss_latency_by_request_and_mach_type_hist[type][mach]->sample(miss_latency); + m_miss_latency_hist.sample(miss_latency); if (mach == GenericMachineType_L1Cache_wCC) { g_system_ptr->getProfiler()->missLatencyWcc(issued_time, diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/system/System.hh --- a/src/mem/ruby/system/System.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/system/System.hh Fri Sep 30 23:05:19 2011 -0400 @@ -114,9 +114,6 @@ } void recordCacheContents(CacheRecorder& tr) const; - static void printConfig(std::ostream& out); - static void printStats(std::ostream& out); - void clearStats() const; uint64 getInstructionCount(int thread) { return 1; } static uint64 diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/system/System.cc --- a/src/mem/ruby/system/System.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/system/System.cc Fri Sep 30 23:05:19 2011 -0400 @@ -92,9 +92,7 @@ void RubySystem::init() -{ - m_profiler_ptr->clearStats(); -} +{ } void RubySystem::registerNetwork(Network* network_ptr) @@ -142,29 +140,6 @@ << " memory_size_bits: " << m_memory_size_bits << endl; } -void -RubySystem::printConfig(ostream& out) -{ - out << "\n================ Begin RubySystem Configuration Print ================\n\n"; - printSystemConfig(out); - m_network_ptr->printConfig(out); - m_profiler_ptr->printConfig(out); - out << "\n================ End RubySystem Configuration Print ================\n\n"; -} - -void -RubySystem::printStats(ostream& out) -{ - const time_t T = time(NULL); - tm *localTime = localtime(&T); - char buf[100]; - strftime(buf, 100, "%b/%d/%Y %H:%M:%S", localTime); - - out << "Real time: " << buf << endl; - - m_profiler_ptr->printStats(out); - m_network_ptr->printStats(out); -} void RubySystem::serialize(std::ostream &os) @@ -180,14 +155,6 @@ // that the profiler can correctly set its start time to the unserialized // value of curTick() // - clearStats(); -} - -void -RubySystem::clearStats() const -{ - m_profiler_ptr->clearStats(); - m_network_ptr->clearStats(); } void @@ -261,7 +228,5 @@ RubyExitCallback::process() { std::ostream *os = simout.create(stats_filename); - RubySystem::printConfig(*os); *os << endl; - RubySystem::printStats(*os); } diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/system/WireBuffer.hh --- a/src/mem/ruby/system/WireBuffer.hh Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/system/WireBuffer.hh Fri Sep 30 23:05:19 2011 -0400 @@ -84,8 +84,6 @@ void printConfig(std::ostream& out); void print(std::ostream& out) const; - void clearStats() const; - void printStats(std::ostream& out) const; uint64_t m_msg_counter; diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/ruby/system/WireBuffer.cc --- a/src/mem/ruby/system/WireBuffer.cc Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/ruby/system/WireBuffer.cc Fri Sep 30 23:05:19 2011 -0400 @@ -149,16 +149,6 @@ } void -WireBuffer::clearStats() const -{ -} - -void -WireBuffer::printStats(ostream& out) const -{ -} - -void WireBuffer::wakeup() { } diff -r 30a97c4198df -r f0d2b5b6a760 src/mem/slicc/symbols/StateMachine.py --- a/src/mem/slicc/symbols/StateMachine.py Tue Sep 27 00:25:26 2011 -0700 +++ b/src/mem/slicc/symbols/StateMachine.py Fri Sep 30 23:05:19 2011 -0400 @@ -219,6 +219,7 @@ #include #include +#include "base/statistics.hh" #include "mem/protocol/${ident}_ProfileDumper.hh" #include "mem/protocol/${ident}_Profiler.hh" #include "mem/protocol/TransitionResult.hh" @@ -249,6 +250,7 @@ $c_ident(const Params *p); static int getNumControllers(); void init(); + void regStats(); MessageBuffer* getMandatoryQueue() const; const int & getVersion() const; const std::string toString() const; @@ -261,8 +263,6 @@ void print(std::ostream& out) const; void printConfig(std::ostream& out) const; void wakeup(); - void printStats(std::ostream& out) const; - void clearStats(); void blockOnQueue(Address addr, MessageBuffer* port); void unblock(Address addr); @@ -312,7 +312,6 @@ code(''' const Address& addr); -std::string m_name; int m_transitions_per_cycle; int m_buffer_size; int m_recycle_latency; @@ -331,6 +330,10 @@ ${ident}_Profiler m_profiler; static int m_num_controllers; +// Statistics + +Stats::Scalar m_busy_count; + // Internal functions ''') @@ -675,6 +678,17 @@ mq_ident = "NULL" code(''' +void +$c_ident::regStats() +{ + m_profiler.regStats(); + + m_busy_count + .name(name() + ".busy_count") + .desc("The number of cycles this controller was busy") + ; +} + int $c_ident::getNumControllers() { @@ -807,42 +821,6 @@ out << " " << it->first << ": " << it->second << endl; } -void -$c_ident::printStats(ostream& out) const -{ -''') - # - # Cache and Memory Controllers have specific profilers associated with - # them. Print out these stats before dumping state transition stats. - # - for param in self.config_parameters: - if param.type_ast.type.ident == "CacheMemory" or \ - param.type_ast.type.ident == "DirectoryMemory" or \ - param.type_ast.type.ident == "MemoryControl": - assert(param.pointer) - code(' m_${{param.ident}}_ptr->printStats(out);') - - code(''' - if (m_version == 0) { - s_profileDumper.dumpStats(out); - } -} - -void $c_ident::clearStats() { -''') - # - # Cache and Memory Controllers have specific profilers associated with - # them. These stats must be cleared too. - # - for param in self.config_parameters: - if param.type_ast.type.ident == "CacheMemory" or \ - param.type_ast.type.ident == "MemoryControl": - assert(param.pointer) - code(' m_${{param.ident}}_ptr->clearStats();') - - code(''' - m_profiler.clearStats(); -} ''') if self.EntryType != None: @@ -981,7 +959,7 @@ assert(counter <= m_transitions_per_cycle); if (counter == m_transitions_per_cycle) { // Count how often we are fully utilized - g_system_ptr->getProfiler()->controllerBusy(m_machineID); + m_busy_count++; // Wakeup in another cycle and try again g_eventQueue_ptr->scheduleEvent(this, 1); @@ -1353,6 +1331,7 @@ #include #include +#include "base/statistics.hh" #include "mem/protocol/${ident}_Event.hh" #include "mem/protocol/${ident}_State.hh" #include "mem/ruby/common/Global.hh" @@ -1367,11 +1346,11 @@ uint64 getEventCount(${ident}_Event event); bool isPossible(${ident}_State state, ${ident}_Event event); uint64 getTransitionCount(${ident}_State state, ${ident}_Event event); - void clearStats(); + void regStats(); private: - int m_counters[${ident}_State_NUM][${ident}_Event_NUM]; - int m_event_counters[${ident}_Event_NUM]; + Stats::Scalar *m_counters[${ident}_State_NUM][${ident}_Event_NUM]; + Stats::Scalar m_event_counters[${ident}_Event_NUM]; bool m_possible[${ident}_State_NUM][${ident}_Event_NUM]; int m_version; }; @@ -1390,6 +1369,7 @@ #include +#include #include "mem/protocol/${ident}_Profiler.hh" ${ident}_Profiler::${ident}_Profiler() @@ -1397,7 +1377,6 @@ for (int state = 0; state < ${ident}_State_NUM; state++) { for (int event = 0; event < ${ident}_Event_NUM; event++) { m_possible[state][event] = false; - m_counters[state][event] = 0; } } for (int event = 0; event < ${ident}_Event_NUM; event++) { @@ -1412,23 +1391,37 @@ } void -${ident}_Profiler::clearStats() +${ident}_Profiler::regStats() { + for (int event=0; event < ${ident}_Event_NUM; event++) { + std::stringstream name; + name << "ruby.${ident}_Controller" << m_version << "." << ${ident}_Event_to_string((${ident}_Event)event); + m_event_counters[event] + .name(name.str().c_str()) + .desc("Number of events that occurred"); + } + for (int state = 0; state < ${ident}_State_NUM; state++) { - for (int event = 0; event < ${ident}_Event_NUM; event++) { - m_counters[state][event] = 0; + for (int event = 0; event < ${ident}_Event_NUM; event++) { + if (m_possible[state][event]) { + m_counters[state][event] = new Stats::Scalar; + std::stringstream name; + name << "ruby.${ident}_Controller" << m_version << "."; + name << ${ident}_State_to_string((${ident}_State) state) << "_"; + name << ${ident}_Event_to_string((${ident}_Event) event); + m_counters[state][event] + ->name(name.str().c_str()) + .desc("Number of transitions that occurred"); + } } } +} - for (int event = 0; event < ${ident}_Event_NUM; event++) { - m_event_counters[event] = 0; - } -} void ${ident}_Profiler::countTransition(${ident}_State state, ${ident}_Event event) { assert(m_possible[state][event]); - m_counters[state][event]++; + (*(m_counters[state][event]))++; m_event_counters[event]++; } void @@ -1441,7 +1434,7 @@ uint64 ${ident}_Profiler::getEventCount(${ident}_Event event) { - return m_event_counters[event]; + return m_event_counters[event].value(); } bool @@ -1454,7 +1447,7 @@ ${ident}_Profiler::getTransitionCount(${ident}_State state, ${ident}_Event event) { - return m_counters[state][event]; + return m_counters[state][event]->value(); } ''')