diff -r 327f7d25947b -r c60014f1a192 configs/common/FSConfig.py
--- a/configs/common/FSConfig.py	Mon Nov 28 18:20:52 2011 +0000
+++ b/configs/common/FSConfig.py	Mon Nov 28 18:20:55 2011 +0000
@@ -91,6 +91,7 @@
     self.console = binary('console')
     self.boot_osflags = 'root=/dev/hda1 console=ttyS0'
 
+    self.system_port = self.membus.port
     return self
 
 def makeLinuxAlphaRubySystem(mem_mode, mdesc = None):
@@ -183,6 +184,7 @@
     self.hypervisor_desc_bin = binary('1up-hv.bin')
     self.partition_desc_bin = binary('1up-md.bin')
 
+    self.system_port = self.membus.port
     return self
 
 def makeArmSystem(mem_mode, machine_type, mdesc = None, bare_metal=False):
@@ -263,6 +265,7 @@
     self.terminal = Terminal()
     self.vncserver = VncServer()
 
+    self.system_port = self.membus.port
     return self
 
 
@@ -301,6 +304,7 @@
     self.console = binary('mips/console')
     self.boot_osflags = 'root=/dev/hda1 console=ttyS0'
 
+    self.system_port = self.membus.port
     return self
 
 def x86IOAddress(port):
diff -r 327f7d25947b -r c60014f1a192 src/arch/alpha/freebsd/system.cc
--- a/src/arch/alpha/freebsd/system.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/alpha/freebsd/system.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -43,7 +43,7 @@
 #include "cpu/thread_context.hh"
 #include "mem/physical.hh"
 #include "mem/port.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 #include "sim/byteswap.hh"
 
 #define TIMER_FREQUENCY 1193180
diff -r 327f7d25947b -r c60014f1a192 src/arch/alpha/linux/system.hh
--- a/src/arch/alpha/linux/system.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/alpha/linux/system.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -128,6 +128,8 @@
     LinuxAlphaSystem(Params *p);
     ~LinuxAlphaSystem();
 
+    virtual void initState();
+
     void setDelayLoop(ThreadContext *tc);
 };
 
diff -r 327f7d25947b -r c60014f1a192 src/arch/alpha/linux/system.cc
--- a/src/arch/alpha/linux/system.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/alpha/linux/system.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -64,6 +64,13 @@
 LinuxAlphaSystem::LinuxAlphaSystem(Params *p)
     : AlphaSystem(p)
 {
+}
+
+void
+LinuxAlphaSystem::initState()
+{
+    AlphaSystem::initState();
+
     Addr addr = 0;
 
     /**
@@ -78,7 +85,7 @@
      * Since we aren't using a bootloader, we have to copy the
      * kernel arguments directly into the kernel's memory.
      */
-    virtPort->writeBlob(CommandLine(), (uint8_t*)params()->boot_osflags.c_str(),
+    virtPort->writeMem(CommandLine(), (uint8_t*)params()->boot_osflags.c_str(),
                 params()->boot_osflags.length()+1);
 
     /**
@@ -88,7 +95,7 @@
      */
     if (kernelSymtab->findAddress("est_cycle_freq", addr))
         virtPort->write(addr, (uint64_t)(SimClock::Frequency /
-                    p->boot_cpu_frequency));
+                    params()->boot_cpu_frequency));
 
 
     /**
@@ -165,9 +172,9 @@
     if (kernelSymtab->findAddress("loops_per_jiffy", addr)) {
         Tick cpuFreq = tc->getCpuPtr()->frequency();
         Tick intrFreq = platform->intrFrequency();
-        VirtualPort *vp;
+        FSTranslatingProxy *vp;
 
-        vp = tc->getVirtPort();
+        vp = tc->getVirtProxy();
         vp->writeHtoG(addr, (uint32_t)((cpuFreq / intrFreq) * 0.9988));
     }
 }
diff -r 327f7d25947b -r c60014f1a192 src/arch/alpha/stacktrace.cc
--- a/src/arch/alpha/stacktrace.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/alpha/stacktrace.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -37,7 +37,7 @@
 #include "base/trace.hh"
 #include "cpu/base.hh"
 #include "cpu/thread_context.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 #include "sim/system.hh"
 
 using namespace std;
@@ -48,7 +48,7 @@
     : tc(_tc)
 {
     Addr addr = 0;
-    VirtualPort *vp = tc->getVirtPort();
+    FSTranslatingProxy *vp = tc->getVirtProxy();
     SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
 
     if (!symtab->findAddress("thread_info_size", addr))
@@ -81,9 +81,9 @@
 
     Addr tsk;
 
-    VirtualPort *vp;
+    FSTranslatingProxy *vp;
 
-    vp = tc->getVirtPort();
+    vp = tc->getVirtProxy();
     tsk = vp->readGtoH<Addr>(base + task_off);
 
     return tsk;
@@ -98,9 +98,9 @@
 
     uint16_t pd;
 
-    VirtualPort *vp;
+    FSTranslatingProxy *vp;
 
-    vp = tc->getVirtPort();
+    vp = tc->getVirtProxy();
     pd = vp->readGtoH<uint16_t>(task + pid_off);
 
     return pd;
diff -r 327f7d25947b -r c60014f1a192 src/arch/alpha/system.hh
--- a/src/arch/alpha/system.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/alpha/system.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -50,6 +50,9 @@
     ~AlphaSystem();
 
   public:
+
+    virtual void initState();
+
     /**
      * Serialization stuff
      */
diff -r 327f7d25947b -r c60014f1a192 src/arch/alpha/system.cc
--- a/src/arch/alpha/system.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/alpha/system.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -39,7 +39,7 @@
 #include "base/trace.hh"
 #include "debug/Loader.hh"
 #include "mem/physical.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 #include "params/AlphaSystem.hh"
 #include "sim/byteswap.hh"
 
@@ -65,6 +65,22 @@
     if (pal == NULL)
         fatal("Could not load PALcode file %s", params()->pal);
 
+}
+
+AlphaSystem::~AlphaSystem()
+{
+    delete consoleSymtab;
+    delete console;
+    delete pal;
+#ifdef DEBUG
+    delete consolePanicEvent;
+#endif
+}
+
+void
+AlphaSystem::initState()
+{
+    System::initState();
 
     // Load program sections into memory
     pal->loadSections(functionalPort, loadAddrMask);
@@ -100,8 +116,10 @@
      * routine to get these command line arguments, but Tru64 and
      * others do.)
      */
+    FSTranslatingProxy vp(systemPort());
+
     if (consoleSymtab->findAddress("env_booted_osflags", addr)) {
-        virtPort->writeBlob(addr, (uint8_t*)params()->boot_osflags.c_str(),
+        vp.writeMem(addr, (uint8_t*)params()->boot_osflags.c_str(),
                 strlen(params()->boot_osflags.c_str()));
     }
 
@@ -112,23 +130,13 @@
     if (consoleSymtab->findAddress("m5_rpb", addr)) {
         uint64_t data;
         data = htog(params()->system_type);
-        virtPort->write(addr+0x50, data);
+        vp.write(addr+0x50, data);
         data = htog(params()->system_rev);
-        virtPort->write(addr+0x58, data);
+        vp.write(addr+0x58, data);
     } else
         panic("could not find hwrpb\n");
 }
 
-AlphaSystem::~AlphaSystem()
-{
-    delete consoleSymtab;
-    delete console;
-    delete pal;
-#ifdef DEBUG
-    delete consolePanicEvent;
-#endif
-}
-
 /**
  * This function fixes up addresses that are used to match PCs for
  * hooking simulator events on to target function executions.
diff -r 327f7d25947b -r c60014f1a192 src/arch/alpha/tru64/system.cc
--- a/src/arch/alpha/tru64/system.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/alpha/tru64/system.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -40,7 +40,7 @@
 #include "kern/system_events.hh"
 #include "mem/physical.hh"
 #include "mem/port.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 
 using namespace std;
 
diff -r 327f7d25947b -r c60014f1a192 src/arch/alpha/utility.cc
--- a/src/arch/alpha/utility.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/alpha/utility.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -33,7 +33,7 @@
 
 #if FULL_SYSTEM
 #include "arch/alpha/vtophys.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 #endif
 
 namespace AlphaISA {
@@ -50,7 +50,7 @@
             return tc->readIntReg(16 + number);
     } else {
         Addr sp = tc->readIntReg(StackPointerReg);
-        VirtualPort *vp = tc->getVirtPort();
+        FSTranslatingProxy *vp = tc->getVirtProxy();
         uint64_t arg = vp->read<uint64_t>(sp +
                            (number-NumArgumentRegs) * sizeof(uint64_t));
         return arg;
diff -r 327f7d25947b -r c60014f1a192 src/arch/alpha/vtophys.cc
--- a/src/arch/alpha/vtophys.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/alpha/vtophys.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -38,7 +38,7 @@
 #include "base/trace.hh"
 #include "cpu/thread_context.hh"
 #include "debug/VtoPhys.hh"
-#include "mem/vport.hh"
+#include "mem/port.hh"
 
 using namespace std;
 
diff -r 327f7d25947b -r c60014f1a192 src/arch/arm/linux/system.cc
--- a/src/arch/arm/linux/system.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/arm/linux/system.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -57,6 +57,13 @@
 LinuxArmSystem::LinuxArmSystem(Params *p)
     : ArmSystem(p)
 {
+}
+
+void
+LinuxArmSystem::initState()
+{
+    ArmSystem::initState();
+
     // Load symbols at physical address, we might not want
     // to do this perminately, for but early bootup work
     // it is helpfulp.
@@ -128,6 +135,13 @@
     secDataPtrAddr &= ~ULL(0x7F);
     secDataAddr &= ~ULL(0x7F);
     penReleaseAddr &= ~ULL(0x7F);
+
+
+    for (int i = 0; i < threadContexts.size(); i++) {
+        threadContexts[i]->setIntReg(0, 0);
+        threadContexts[i]->setIntReg(1, params()->machine_type);
+        threadContexts[i]->setIntReg(2, ParamsList);
+    }
 }
 
 bool
@@ -140,18 +154,6 @@
     return false;
 }
 
-void
-LinuxArmSystem::initState()
-{
-    ArmSystem::initState();
-
-    for (int i = 0; i < threadContexts.size(); i++) {
-        threadContexts[i]->setIntReg(0, 0);
-        threadContexts[i]->setIntReg(1, params()->machine_type);
-        threadContexts[i]->setIntReg(2, ParamsList);
-    }
-}
-
 LinuxArmSystem::~LinuxArmSystem()
 {
     if (uDelaySkipEvent)
diff -r 327f7d25947b -r c60014f1a192 src/arch/arm/stacktrace.cc
--- a/src/arch/arm/stacktrace.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/arm/stacktrace.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -37,7 +37,7 @@
 #include "base/trace.hh"
 #include "cpu/base.hh"
 #include "cpu/thread_context.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 #include "sim/system.hh"
 
 using namespace std;
@@ -48,9 +48,9 @@
     {
         Addr addr = 0;
 
-        VirtualPort *vp;
+        FSTranslatingProxy *vp;
 
-        vp = tc->getVirtPort();
+        vp = tc->getVirtProxy();
 
         if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_size", addr))
             panic("thread info not compiled into kernel\n");
diff -r 327f7d25947b -r c60014f1a192 src/arch/arm/system.cc
--- a/src/arch/arm/system.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/arm/system.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -55,19 +55,25 @@
     : System(p), bootldr(NULL)
 {
     debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk");
+}
 
-    if ((p->boot_loader == "") != (p->boot_loader_mem == NULL))
+void
+ArmSystem::initState()
+{
+    System::initState();
+
+    if ((params()->boot_loader == "") != (params()->boot_loader_mem == NULL))
         fatal("If boot_loader is specifed, memory to load it must be also.\n");
 
-    if (p->boot_loader != "") {
-        bootldr = createObjectFile(p->boot_loader);
+    if (params()->boot_loader != "") {
+        bootldr = createObjectFile(params()->boot_loader);
 
         if (!bootldr)
-            fatal("Could not read bootloader: %s\n", p->boot_loader);
+            fatal("Could not read bootloader: %s\n", params()->boot_loader);
 
         Port *mem_port;
         FunctionalPort fp(name() + "-fport");
-        mem_port = p->boot_loader_mem->getPort("functional");
+        mem_port = params()->boot_loader_mem->getPort("functional");
         fp.setPeer(mem_port);
         mem_port->setPeer(&fp);
 
@@ -82,12 +88,7 @@
 
         inform("Using bootloader at address %#x\n", bootldr->entryPoint());
     }
-}
 
-void
-ArmSystem::initState()
-{
-    System::initState();
     if (bootldr) {
         // Put the address of the boot loader into r7 so we know
         // where to branch to after the reset fault
diff -r 327f7d25947b -r c60014f1a192 src/arch/arm/utility.cc
--- a/src/arch/arm/utility.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/arm/utility.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -45,7 +45,7 @@
 
 #if FULL_SYSTEM
 #include "arch/arm/vtophys.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 #endif
 
 #include "arch/arm/tlb.hh"
@@ -89,7 +89,7 @@
         }
     } else {
         Addr sp = tc->readIntReg(StackPointerReg);
-        VirtualPort *vp = tc->getVirtPort();
+        FSTranslatingProxy *vp = tc->getVirtProxy();
         uint64_t arg;
         if (size == sizeof(uint64_t)) {
             // If the argument is even it must be aligned
diff -r 327f7d25947b -r c60014f1a192 src/arch/arm/vtophys.cc
--- a/src/arch/arm/vtophys.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/arm/vtophys.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -51,7 +51,7 @@
 #include "base/chunk_generator.hh"
 #include "base/trace.hh"
 #include "cpu/thread_context.hh"
-#include "mem/vport.hh"
+#include "mem/port.hh"
 
 using namespace std;
 using namespace ArmISA;
diff -r 327f7d25947b -r c60014f1a192 src/arch/mips/linux/system.cc
--- a/src/arch/mips/linux/system.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/mips/linux/system.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -157,9 +157,9 @@
     if (kernelSymtab->findAddress("loops_per_jiffy", addr)) {
         Tick cpuFreq = tc->getCpuPtr()->frequency();
         Tick intrFreq = platform->intrFrequency();
-        VirtualPort *vp;
+        FSTranslatingProxy *vp;
 
-        vp = tc->getVirtPort();
+        vp = tc->getVirtProxy();
         vp->writeHtoG(addr, (uint32_t)((cpuFreq / intrFreq) * 0.9988));
     }
 }
diff -r 327f7d25947b -r c60014f1a192 src/arch/mips/stacktrace.cc
--- a/src/arch/mips/stacktrace.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/mips/stacktrace.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -54,9 +54,9 @@
 
     Addr tsk;
 
-    VirtualPort *vp;
+    FSTranslatingProxy *vp;
 
-    vp = tc->getVirtPort();
+    vp = tc->getVirtProxy();
     tsk = vp->readGtoH<Addr>(base + task_off);
 
     return tsk;
@@ -71,9 +71,9 @@
 
     uint16_t pd;
 
-    VirtualPort *vp;
+    FSTranslatingProxy *vp;
 
-    vp = tc->getVirtPort();
+    vp = tc->getVirtProxy();
     pd = vp->readGtoH<uint16_t>(task + pid_off);
 
     return pd;
diff -r 327f7d25947b -r c60014f1a192 src/arch/mips/utility.cc
--- a/src/arch/mips/utility.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/mips/utility.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -42,7 +42,7 @@
 #if FULL_SYSTEM
 #include "arch/mips/registers.hh"
 #include "arch/mips/vtophys.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 #endif
 
 
@@ -62,7 +62,7 @@
             return tc->readIntReg(FirstArgumentReg + number);
     } else {
         Addr sp = tc->readIntReg(StackPointerReg);
-        VirtualPort *vp = tc->getVirtPort();
+        FSTranslatingProxy *vp = tc->getVirtProxy();
         uint64_t arg = vp->read<uint64_t>(sp +
                 (number - 4) * sizeof(uint64_t));
         return arg;
diff -r 327f7d25947b -r c60014f1a192 src/arch/mips/vtophys.cc
--- a/src/arch/mips/vtophys.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/mips/vtophys.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -37,7 +37,7 @@
 #include "base/chunk_generator.hh"
 #include "base/trace.hh"
 #include "cpu/thread_context.hh"
-#include "mem/vport.hh"
+#include "mem/port.hh"
 
 using namespace std;
 using namespace MipsISA;
diff -r 327f7d25947b -r c60014f1a192 src/arch/sparc/system.hh
--- a/src/arch/sparc/system.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/sparc/system.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -48,6 +48,8 @@
     SparcSystem(Params *p);
     ~SparcSystem();
 
+    virtual void initState();
+
 /**
  * Serialization stuff
  */
diff -r 327f7d25947b -r c60014f1a192 src/arch/sparc/system.cc
--- a/src/arch/sparc/system.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/sparc/system.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -68,6 +68,11 @@
     rom_port = params()->partition_desc->getPort("functional");
     funcPartDescPort.setPeer(rom_port);
     rom_port->setPeer(&funcPartDescPort);
+}
+
+void
+SparcSystem::initState()
+{
 
     /**
      * Load the boot code, and hypervisor into memory.
diff -r 327f7d25947b -r c60014f1a192 src/arch/sparc/utility.cc
--- a/src/arch/sparc/utility.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/sparc/utility.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -33,7 +33,7 @@
 #include "arch/sparc/utility.hh"
 #if FULL_SYSTEM
 #include "arch/sparc/vtophys.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 #endif
 
 namespace SparcISA {
@@ -54,7 +54,7 @@
         return tc->readIntReg(8 + number);
     } else {
         Addr sp = tc->readIntReg(StackPointerReg);
-        VirtualPort *vp = tc->getVirtPort();
+        FSTranslatingProxy *vp = tc->getVirtProxy();
         uint64_t arg = vp->read<uint64_t>(sp + 92 +
                             (number-NumArgumentRegs) * sizeof(uint64_t));
         return arg;
diff -r 327f7d25947b -r c60014f1a192 src/arch/sparc/vtophys.cc
--- a/src/arch/sparc/vtophys.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/sparc/vtophys.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -37,7 +37,8 @@
 #include "base/trace.hh"
 #include "cpu/thread_context.hh"
 #include "debug/VtoPhys.hh"
-#include "mem/vport.hh"
+#include "mem/port.hh"
+#include "sim/byteswap.hh"
 
 using namespace std;
 
diff -r 327f7d25947b -r c60014f1a192 src/arch/x86/stacktrace.cc
--- a/src/arch/x86/stacktrace.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/x86/stacktrace.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -37,8 +37,8 @@
 #include "base/trace.hh"
 #include "cpu/base.hh"
 #include "cpu/thread_context.hh"
-#include "mem/vport.hh"
 #include "sim/system.hh"
+#include "mem/fs_translating_proxy.hh"
 
 using namespace std;
 namespace X86ISA
@@ -48,9 +48,9 @@
     {
         Addr addr = 0;
 
-        VirtualPort *vp;
+        FSTranslatingProxy *vp;
 
-        vp = tc->getVirtPort();
+        vp = tc->getVirtProxy();
 
         if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_size", addr))
             panic("thread info not compiled into kernel\n");
@@ -82,9 +82,9 @@
 
         Addr tsk;
 
-        VirtualPort *vp;
+        FSTranslatingProxy *vp;
 
-        vp = tc->getVirtPort();
+        vp = tc->getVirtProxy();
         tsk = vp->readGtoH<Addr>(base + task_off);
 
         return tsk;
@@ -99,9 +99,9 @@
 
         uint16_t pd;
 
-        VirtualPort *vp;
+        FSTranslatingProxy *vp;
 
-        vp = tc->getVirtPort();
+        vp = tc->getVirtProxy();
         pd = vp->readGtoH<uint16_t>(task + pid_off);
 
         return pd;
diff -r 327f7d25947b -r c60014f1a192 src/arch/x86/system.cc
--- a/src/arch/x86/system.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/arch/x86/system.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -61,8 +61,6 @@
     mpConfigTable(p->intel_mp_table),
     rsdp(p->acpi_description_table_pointer)
 {
-    if (kernel->getArch() == ObjectFile::I386)
-        fatal("Loading a 32 bit x86 kernel is not supported.\n");
 }
 
 static void
@@ -116,6 +114,9 @@
 {
     System::initState();
 
+    if (kernel->getArch() == ObjectFile::I386)
+        fatal("Loading a 32 bit x86 kernel is not supported.\n");
+
     ThreadContext *tc = threadContexts[0];
     // This is the boot strap processor (BSP). Initialize it to look like
     // the boot loader has just turned control over to the 64 bit OS. We
diff -r 327f7d25947b -r c60014f1a192 src/base/remote_gdb.cc
--- a/src/base/remote_gdb.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/base/remote_gdb.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -126,7 +126,7 @@
 
 #if FULL_SYSTEM
 #include "arch/vtophys.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 #endif
 
 #include "base/intmath.hh"
@@ -465,8 +465,8 @@
     DPRINTF(GDBRead, "read:  addr=%#x, size=%d", vaddr, size);
 
 #if FULL_SYSTEM
-    VirtualPort *port = context->getVirtPort();
-    port->readBlob(vaddr, (uint8_t*)data, size);
+    FSTranslatingProxy *port = context->getVirtProxy();
+    port->readMem(vaddr, (uint8_t*)data, size);
 #else
     SETranslatingProxy *port = context->getMemProxy();
     port->readMem(vaddr, (uint8_t*)data, size);
@@ -508,8 +508,8 @@
             DPRINTFNR("\n");
     }
 #if FULL_SYSTEM
-    VirtualPort *port = context->getVirtPort();
-    port->writeBlob(vaddr, (uint8_t*)data, size);
+    FSTranslatingProxy *port = context->getVirtProxy();
+    port->writeMem(vaddr, (uint8_t*)data, size);
 #else
     SETranslatingProxy *port = context->getMemProxy();
     port->writeMem(vaddr, (uint8_t*)data, size);
diff -r 327f7d25947b -r c60014f1a192 src/cpu/checker/thread_context.hh
--- a/src/cpu/checker/thread_context.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/cpu/checker/thread_context.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -99,8 +99,8 @@
 
     FunctionalPort *getPhysPort() { return actualTC->getPhysPort(); }
 
-    VirtualPort *getVirtPort()
-    { return actualTC->getVirtPort(); }
+    FSTranslatingProxy *getVirtProxy()
+    { return actualTC->getVirtProxy(); }
 #else
     SETranslatingProxy *getMemProxy() { return actualTC->getMemProxy(); }
 
diff -r 327f7d25947b -r c60014f1a192 src/cpu/inorder/thread_context.hh
--- a/src/cpu/inorder/thread_context.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/cpu/inorder/thread_context.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -120,7 +120,7 @@
 
     FunctionalPort *getPhysPort() { return thread->getPhysPort(); }
 
-    VirtualPort *getVirtPort();
+    FSTranslatingProxy *getVirtProxy();
 
     void connectMemPorts(ThreadContext *tc)
     { thread->connectMemPorts(tc); }
diff -r 327f7d25947b -r c60014f1a192 src/cpu/inorder/thread_context.cc
--- a/src/cpu/inorder/thread_context.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/cpu/inorder/thread_context.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -39,10 +39,10 @@
 
 #if FULL_SYSTEM
 
-VirtualPort *
-InOrderThreadContext::getVirtPort()
+FSTranslatingProxy *
+InOrderThreadContext::getVirtProxy()
 {
-    return thread->getVirtPort();
+    return thread->getVirtProxy();
 }
 
 
diff -r 327f7d25947b -r c60014f1a192 src/cpu/o3/thread_context.hh
--- a/src/cpu/o3/thread_context.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/cpu/o3/thread_context.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -99,7 +99,7 @@
 
     virtual FunctionalPort *getPhysPort() { return thread->getPhysPort(); }
 
-    virtual VirtualPort *getVirtPort();
+    virtual FSTranslatingProxy *getVirtProxy();
 
     virtual void connectMemPorts(ThreadContext *tc) { thread->connectMemPorts(tc); }
 #else
diff -r 327f7d25947b -r c60014f1a192 src/cpu/o3/thread_context_impl.hh
--- a/src/cpu/o3/thread_context_impl.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/cpu/o3/thread_context_impl.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -49,10 +49,10 @@
 
 #if FULL_SYSTEM
 template <class Impl>
-VirtualPort *
-O3ThreadContext<Impl>::getVirtPort()
+FSTranslatingProxy *
+O3ThreadContext<Impl>::getVirtProxy()
 {
-    return thread->getVirtPort();
+    return thread->getVirtProxy();
 }
 
 template <class Impl>
diff -r 327f7d25947b -r c60014f1a192 src/cpu/ozone/cpu.hh
--- a/src/cpu/ozone/cpu.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/cpu/ozone/cpu.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -126,8 +126,8 @@
 
         FunctionalPort *getPhysPort() { return thread->getPhysPort(); }
 
-        VirtualPort *getVirtPort()
-        { return thread->getVirtPort(); }
+        FSTranslatingProxy *getVirtProxy()
+        { return thread->getVirtProxy(); }
 #else
         SETranslatingProxy *getMemProxy() { return thread->getMemProxy(); }
 
diff -r 327f7d25947b -r c60014f1a192 src/cpu/ozone/cpu_impl.hh
--- a/src/cpu/ozone/cpu_impl.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/cpu/ozone/cpu_impl.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -197,18 +197,18 @@
 #if FULL_SYSTEM
     Port *mem_port;
     FunctionalPort *phys_port;
-    VirtualPort *virt_port;
+    FSTranslatingProxy *virt_proxy;
     phys_port = new FunctionalPort(csprintf("%s-%d-funcport",
                                             name(), 0));
     mem_port = system->physmem->getPort("functional");
     mem_port->setPeer(phys_port);
     phys_port->setPeer(mem_port);
 
-    virt_port = new VirtualPort(csprintf("%s-%d-vport",
+    virt_proxy = new FSTranslatingProxy(csprintf("%s-%d-vport",
                                          name(), 0));
-    mem_port = system->physmem->getPort("functional");
-    mem_port->setPeer(virt_port);
-    virt_port->setPeer(mem_port);
+    //mem_port = system->physmem->getPort("functional");
+    //mem_port->setPeer(virt_port);
+    //virt_port->setPeer(mem_port);
 
     thread.setPhysPort(phys_port);
     thread.setVirtPort(virt_port);
diff -r 327f7d25947b -r c60014f1a192 src/cpu/simple_thread.hh
--- a/src/cpu/simple_thread.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/cpu/simple_thread.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -214,7 +214,7 @@
      * After a CPU switch it may point to the wrong memory object which could
      * mean stale data.
      */
-    VirtualPort *getVirtPort() { return virtPort; }
+    FSTranslatingProxy *getVirtProxy() { return virtPort; }
 #endif
 
     Status status() const { return _status; }
diff -r 327f7d25947b -r c60014f1a192 src/cpu/simple_thread.cc
--- a/src/cpu/simple_thread.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/cpu/simple_thread.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -50,7 +50,7 @@
 #include "base/trace.hh"
 #include "cpu/profile.hh"
 #include "cpu/quiesce_event.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 #include "sim/serialize.hh"
 #include "sim/sim_exit.hh"
 #else
diff -r 327f7d25947b -r c60014f1a192 src/cpu/thread_context.hh
--- a/src/cpu/thread_context.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/cpu/thread_context.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -52,7 +52,7 @@
 class EndQuiesceEvent;
 class SETranslatingProxy;
 class FunctionalPort;
-class VirtualPort;
+class FSTranslatingProxy;
 class Process;
 class System;
 namespace TheISA {
@@ -130,7 +130,7 @@
 
     virtual FunctionalPort *getPhysPort() = 0;
 
-    virtual VirtualPort *getVirtPort() = 0;
+    virtual FSTranslatingProxy *getVirtProxy() = 0;
 
     virtual void connectMemPorts(ThreadContext *tc) = 0;
 #else
@@ -300,7 +300,7 @@
 
     FunctionalPort *getPhysPort() { return actualTC->getPhysPort(); }
 
-    VirtualPort *getVirtPort() { return actualTC->getVirtPort(); }
+    FSTranslatingProxy *getVirtProxy() { return actualTC->getVirtProxy(); }
 
     void connectMemPorts(ThreadContext *tc) { actualTC->connectMemPorts(tc); }
 #else
diff -r 327f7d25947b -r c60014f1a192 src/cpu/thread_state.hh
--- a/src/cpu/thread_state.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/cpu/thread_state.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -113,7 +113,7 @@
 
     void setPhysPort(FunctionalPort *port) { physPort = port; }
 
-    VirtualPort *getVirtPort() { return virtPort; }
+    FSTranslatingProxy *getVirtProxy() { return virtPort; }
 #else
     Process *getProcessPtr() { return process; }
 
@@ -192,7 +192,7 @@
 
     /** A functional port, outgoing only, for functional accesse to virtual
      * addresses. */
-    VirtualPort *virtPort;
+    FSTranslatingProxy *virtPort;
 #else
     SETranslatingProxy *port;
 
diff -r 327f7d25947b -r c60014f1a192 src/cpu/thread_state.cc
--- a/src/cpu/thread_state.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/cpu/thread_state.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -39,7 +39,7 @@
 #if FULL_SYSTEM
 #include "arch/kernel_stats.hh"
 #include "cpu/quiesce_event.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 #endif
 
 #if FULL_SYSTEM
@@ -128,15 +128,8 @@
 void
 ThreadState::connectVirtPort(ThreadContext *tc)
 {
-    // @todo: For now this disregards any older port that may have
-    // already existed.  Fix this memory leak once the bus port IDs
-    // for functional ports is resolved.
-    if (virtPort)
-        virtPort->removeConn();
-    else
-        virtPort = new VirtualPort(csprintf("%s-%d-vport",
-                                        baseCpu->name(), _threadId), tc);
-    connectToMemFunc(virtPort);
+    if (virtPort == NULL)
+        virtPort = new FSTranslatingProxy(tc);
 }
 
 void
diff -r 327f7d25947b -r c60014f1a192 src/mem/SConscript
--- a/src/mem/SConscript	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/mem/SConscript	Mon Nov 28 18:20:55 2011 +0000
@@ -47,8 +47,7 @@
 
 if env['TARGET_ISA'] != 'no':
     if env['FULL_SYSTEM']:
-        #Source('fs_translating_proxy.cc')
-        pass
+        Source('fs_translating_proxy.cc')
     else:
         Source('se_translating_proxy.cc')
 
@@ -58,7 +57,7 @@
     Source('physical.cc')
 
 if env['FULL_SYSTEM']:
-    Source('vport.cc')
+    pass
 elif env['TARGET_ISA'] != 'no':
     Source('page_table.cc')
 
diff -r 327f7d25947b -r c60014f1a192 src/mem/fs_translating_proxy.cc
--- a/src/mem/fs_translating_proxy.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/mem/fs_translating_proxy.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -46,7 +46,7 @@
 using namespace TheISA;
 
 FSTranslatingProxy::FSTranslatingProxy(ThreadContext *tc)
-: PortProxy(*(tc->getCpuPtr()->getDataPort())), _tc(tc)
+: PortProxy(*(tc->getCpuPtr()->getPort("dcache_port"))), _tc(tc)
 {
 }
 
diff -r 327f7d25947b -r c60014f1a192 src/sim/arguments.hh
--- a/src/sim/arguments.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/sim/arguments.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -36,7 +36,7 @@
 #include "arch/vtophys.hh"
 #include "base/refcnt.hh"
 #include "base/types.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 
 class ThreadContext;
 
diff -r 327f7d25947b -r c60014f1a192 src/sim/system.hh
--- a/src/sim/system.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/sim/system.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -60,7 +60,7 @@
 #if FULL_SYSTEM
 class Platform;
 class FunctionalPort;
-class VirtualPort;
+class FSTranslatingProxy;
 #endif
 class GDBListener;
 class BaseRemoteGDB;
@@ -145,7 +145,7 @@
     /** Port to physical memory used for writing object files into ram at
      * boot.*/
     FunctionalPort *functionalPort;
-    VirtualPort *virtPort;
+    FSTranslatingProxy *virtPort;
 
     /** kernel symbol table */
     SymbolTable *kernelSymtab;
diff -r 327f7d25947b -r c60014f1a192 src/sim/system.cc
--- a/src/sim/system.cc	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/sim/system.cc	Mon Nov 28 18:20:55 2011 +0000
@@ -52,7 +52,7 @@
 #if FULL_SYSTEM
 #include "arch/vtophys.hh"
 #include "kern/kernel_stats.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 #else
 #include "params/System.hh"
 #endif
@@ -111,11 +111,14 @@
     functionalPort->setPeer(mem_port);
     mem_port->setPeer(functionalPort);
 
-    virtPort = new VirtualPort(name() + "-fport");
-    mem_port = physmem->getPort("functional");
-    virtPort->setPeer(mem_port);
-    mem_port->setPeer(virtPort);
+    virtPort = new FSTranslatingProxy(systemPort());
+#endif
+}
 
+void
+System::initState()
+{
+#if FULL_SYSTEM
 
     /**
      * Load the kernel code into memory
@@ -163,6 +166,12 @@
     numSystemsRunning++;
 
     activeCpus.clear();
+
+#if FULL_SYSTEM
+    int i;
+    for (i = 0; i < threadContexts.size(); i++)
+        TheISA::startupCPU(threadContexts[i], i);
+#endif
 }
 
 System::~System()
@@ -260,16 +269,6 @@
 }
 
 void
-System::initState()
-{
-#if FULL_SYSTEM
-    int i;
-    for (i = 0; i < threadContexts.size(); i++)
-        TheISA::startupCPU(threadContexts[i], i);
-#endif
-}
-
-void
 System::replaceThreadContext(ThreadContext *tc, int context_id)
 {
     if (context_id >= threadContexts.size()) {
diff -r 327f7d25947b -r c60014f1a192 src/sim/vptr.hh
--- a/src/sim/vptr.hh	Mon Nov 28 18:20:52 2011 +0000
+++ b/src/sim/vptr.hh	Mon Nov 28 18:20:55 2011 +0000
@@ -33,7 +33,7 @@
 
 #include "arch/isa_traits.hh"
 #include "arch/vtophys.hh"
-#include "mem/vport.hh"
+#include "mem/fs_translating_proxy.hh"
 
 class ThreadContext;
 
@@ -71,8 +71,8 @@
         if (!ptr)
             return;
 
-        VirtualPort *port = tc->getVirtPort();
-        port->readBlob(ptr, buffer, sizeof(T));
+        FSTranslatingProxy *port = tc->getVirtProxy();
+        port->readMem(ptr, buffer, sizeof(T));
     }
 
     bool
diff -r 327f7d25947b -r c60014f1a192 tests/configs/t1000-simple-atomic.py
--- a/tests/configs/t1000-simple-atomic.py	Mon Nov 28 18:20:52 2011 +0000
+++ b/tests/configs/t1000-simple-atomic.py	Mon Nov 28 18:20:55 2011 +0000
@@ -36,8 +36,6 @@
 system.cpu = cpu
 cpu.connectAllPorts(system.membus)
 
-system.system_port = system.membus.port
-
 root = Root(system=system)
 
 m5.ticks.setGlobalFrequency('2GHz')
diff -r 327f7d25947b -r c60014f1a192 tests/configs/tsunami-inorder.py
--- a/tests/configs/tsunami-inorder.py	Mon Nov 28 18:20:52 2011 +0000
+++ b/tests/configs/tsunami-inorder.py	Mon Nov 28 18:20:55 2011 +0000
@@ -98,8 +98,6 @@
 cpu.connectAllPorts(system.toL2Bus, system.membus)
 cpu.clock = '2GHz'
 
-system.system_port = system.membus.port
-
 root = Root(system=system)
 m5.ticks.setGlobalFrequency('1THz')
 
diff -r 327f7d25947b -r c60014f1a192 tests/configs/tsunami-o3-dual.py
--- a/tests/configs/tsunami-o3-dual.py	Mon Nov 28 18:20:52 2011 +0000
+++ b/tests/configs/tsunami-o3-dual.py	Mon Nov 28 18:20:55 2011 +0000
@@ -97,8 +97,6 @@
     c.connectAllPorts(system.toL2Bus, system.membus)
     c.clock = '2GHz'
 
-system.system_port = system.membus.port
-
 root = Root(system=system)
 m5.ticks.setGlobalFrequency('1THz')
 
diff -r 327f7d25947b -r c60014f1a192 tests/configs/tsunami-o3.py
--- a/tests/configs/tsunami-o3.py	Mon Nov 28 18:20:52 2011 +0000
+++ b/tests/configs/tsunami-o3.py	Mon Nov 28 18:20:55 2011 +0000
@@ -95,8 +95,6 @@
 cpu.connectAllPorts(system.toL2Bus, system.membus)
 cpu.clock = '2GHz'
 
-system.system_port = system.membus.port
-
 root = Root(system=system)
 m5.ticks.setGlobalFrequency('1THz')
 
diff -r 327f7d25947b -r c60014f1a192 tests/configs/tsunami-simple-atomic-dual.py
--- a/tests/configs/tsunami-simple-atomic-dual.py	Mon Nov 28 18:20:52 2011 +0000
+++ b/tests/configs/tsunami-simple-atomic-dual.py	Mon Nov 28 18:20:55 2011 +0000
@@ -95,7 +95,5 @@
     c.connectAllPorts(system.toL2Bus, system.membus)
     c.clock = '2GHz'
 
-system.system_port = system.membus.port
-
 root = Root(system=system)
 m5.ticks.setGlobalFrequency('1THz')
diff -r 327f7d25947b -r c60014f1a192 tests/configs/tsunami-simple-atomic.py
--- a/tests/configs/tsunami-simple-atomic.py	Mon Nov 28 18:20:52 2011 +0000
+++ b/tests/configs/tsunami-simple-atomic.py	Mon Nov 28 18:20:55 2011 +0000
@@ -93,8 +93,6 @@
 cpu.connectAllPorts(system.toL2Bus, system.membus)
 cpu.clock = '2GHz'
 
-system.system_port = system.membus.port
-
 root = Root(system=system)
 m5.ticks.setGlobalFrequency('1THz')
 
diff -r 327f7d25947b -r c60014f1a192 tests/configs/tsunami-simple-timing-dual.py
--- a/tests/configs/tsunami-simple-timing-dual.py	Mon Nov 28 18:20:52 2011 +0000
+++ b/tests/configs/tsunami-simple-timing-dual.py	Mon Nov 28 18:20:55 2011 +0000
@@ -95,8 +95,6 @@
     c.connectAllPorts(system.toL2Bus, system.membus)
     c.clock = '2GHz'
 
-system.system_port = system.membus.port
-
 root = Root(system=system)
 m5.ticks.setGlobalFrequency('1THz')
 
diff -r 327f7d25947b -r c60014f1a192 tests/configs/tsunami-simple-timing.py
--- a/tests/configs/tsunami-simple-timing.py	Mon Nov 28 18:20:52 2011 +0000
+++ b/tests/configs/tsunami-simple-timing.py	Mon Nov 28 18:20:55 2011 +0000
@@ -95,8 +95,6 @@
 cpu.connectAllPorts(system.toL2Bus, system.membus)
 cpu.clock = '2GHz'
 
-system.system_port = system.membus.port
-
 root = Root(system=system)
 m5.ticks.setGlobalFrequency('1THz')