diff -r d5f80d6a6acf -r 2721a77698f2 src/mem/bus.hh
--- a/src/mem/bus.hh	Thu Jan 05 13:21:10 2012 +0000
+++ b/src/mem/bus.hh	Thu Jan 05 13:22:19 2012 +0000
@@ -321,9 +321,6 @@
     /** Port that handles requests that don't match any of the interfaces.*/
     BusPort *defaultPort;
 
-    BusPort *funcPort;
-    int funcPortId;
-
     /** If true, use address range provided by default device.  Any
        address not handled by another port and not in default device's
        range will cause a fatal error.  If false, just send all
diff -r d5f80d6a6acf -r 2721a77698f2 src/mem/bus.cc
--- a/src/mem/bus.cc	Thu Jan 05 13:21:10 2012 +0000
+++ b/src/mem/bus.cc	Thu Jan 05 13:22:19 2012 +0000
@@ -47,7 +47,7 @@
     : MemObject(p), busId(p->bus_id), clock(p->clock),
       headerCycles(p->header_cycles), width(p->width), tickNextIdle(0),
       drainEvent(NULL), busIdle(this), inRetry(false), maxId(0),
-      defaultPort(NULL), funcPort(NULL), funcPortId(-4),
+      defaultPort(NULL),
       useDefaultRange(p->use_default_range), defaultBlockSize(p->block_size),
       cachedBlockSize(0), cachedBlockSizeValid(false)
 {
@@ -75,16 +75,6 @@
             fatal("Default port already set\n");
     }
     int id;
-    if (if_name == "functional") {
-        if (!funcPort) {
-            id = maxId++;
-            funcPort = new BusPort(csprintf("%s-p%d-func", name(), id), this, id);
-            funcPortId = id;
-            interfaces[id] = funcPort;
-        }
-        return funcPort;
-    }
-
     // if_name ignored?  forced to be empty?
     id = maxId++;
     assert(maxId < std::numeric_limits<typeof(maxId)>::max());
@@ -533,7 +523,7 @@
     m5::hash_map<short,BusPort*>::iterator intIter;
 
     for (intIter = interfaces.begin(); intIter != interfaces.end(); intIter++)
-        if (intIter->first != id && intIter->first != funcPortId)
+        if (intIter->first != id)
             intIter->second->sendRangeChange();
 
     if (id != defaultId && defaultPort)
diff -r d5f80d6a6acf -r 2721a77698f2 src/mem/cache/cache_impl.hh
--- a/src/mem/cache/cache_impl.hh	Thu Jan 05 13:21:10 2012 +0000
+++ b/src/mem/cache/cache_impl.hh	Thu Jan 05 13:22:19 2012 +0000
@@ -103,13 +103,7 @@
         return cpuSidePort;
     } else if (if_name == "mem_side") {
         return memSidePort;
-    } else if (if_name == "functional") {
-        CpuSidePort *funcPort =
-            new CpuSidePort(name() + "-cpu_side_funcport", this,
-                            "CpuSideFuncPort");
-        funcPort->setOtherPort(memSidePort);
-        return funcPort;
-    } else {
+    }  else {
         panic("Port name %s unrecognized\n", if_name);
     }
 }
diff -r d5f80d6a6acf -r 2721a77698f2 src/mem/physical.cc
--- a/src/mem/physical.cc	Thu Jan 05 13:21:10 2012 +0000
+++ b/src/mem/physical.cc	Thu Jan 05 13:22:19 2012 +0000
@@ -372,13 +372,6 @@
 Port *
 PhysicalMemory::getPort(const std::string &if_name, int idx)
 {
-    // Accept request for "functional" port for backwards compatibility
-    // with places where this function is called from C++.  I'd prefer
-    // to move all these into Python someday.
-    if (if_name == "functional") {
-        return new MemoryPort(csprintf("%s-functional", name()), this);
-    }
-
     if (if_name != "port") {
         panic("PhysicalMemory::getPort: unknown port %s requested", if_name);
     }
diff -r d5f80d6a6acf -r 2721a77698f2 src/mem/ruby/system/RubyPort.cc
--- a/src/mem/ruby/system/RubyPort.cc	Thu Jan 05 13:21:10 2012 +0000
+++ b/src/mem/ruby/system/RubyPort.cc	Thu Jan 05 13:22:19 2012 +0000
@@ -89,14 +89,6 @@
         return physMemPort;
     }
 
-    if (if_name == "functional") {
-        // Calls for the functional port only want to access
-        // functional memory.  Therefore, directly pass these calls
-        // ports to physmem.
-        assert(physmem != NULL);
-        return physmem->getPort(if_name, idx);
-    }
-
     return NULL;
 }