diff -r ecc66717b9f8 -r 3c76e843bd13 src/cpu/o3/comm.hh
--- a/src/cpu/o3/comm.hh	Fri Dec 30 18:30:23 2011 -0600
+++ b/src/cpu/o3/comm.hh	Fri Dec 30 18:30:39 2011 -0600
@@ -196,10 +196,6 @@
 
         // Instruction that caused the a non-mispredict squash
         DynInstPtr squashInst;
-        // If an interrupt is pending and fetch should stall
-        bool interruptPending;
-        // If the interrupt ended up being cleared before being handled
-        bool clearInterrupt;
 
         //////////// For IEW //////////////////
         // Communication specifically to the IQ to tell the IQ that it can
diff -r ecc66717b9f8 -r 3c76e843bd13 src/cpu/o3/commit_impl.hh
--- a/src/cpu/o3/commit_impl.hh	Fri Dec 30 18:30:23 2011 -0600
+++ b/src/cpu/o3/commit_impl.hh	Fri Dec 30 18:30:39 2011 -0600
@@ -710,7 +710,7 @@
     if (!cpu->checkInterrupts(cpu->tcBase(0))) {
         DPRINTF(Commit, "Pending interrupt is cleared by master before "
                 "it got handled. Restart fetching from the orig path.\n");
-        toIEW->commitInfo[0].clearInterrupt = true;
+        cpu->clearInterrupt = true;
         interrupt = NoFault;
         return;
     }
@@ -723,7 +723,7 @@
         DPRINTF(Commit, "Interrupt detected.\n");
 
         // Clear the interrupt now that it's going to be handled
-        toIEW->commitInfo[0].clearInterrupt = true;
+        cpu->clearInterrupt = true;
 
         assert(!thread[0]->inSyscall);
         thread[0]->inSyscall = true;
@@ -764,7 +764,7 @@
     // will make fetch wait until it sees a non PAL-mode PC,
     // at which point it stops fetching instructions.
     if (interrupt != NoFault)
-        toIEW->commitInfo[0].interruptPending = true;
+        cpu->interruptPending = true;
 }
 
 #endif // FULL_SYSTEM
diff -r ecc66717b9f8 -r 3c76e843bd13 src/cpu/o3/cpu.hh
--- a/src/cpu/o3/cpu.hh	Fri Dec 30 18:30:23 2011 -0600
+++ b/src/cpu/o3/cpu.hh	Fri Dec 30 18:30:39 2011 -0600
@@ -117,6 +117,10 @@
     /** Per-thread status in CPU, used for SMT.  */
     Status _threadStatus[Impl::MaxThreads];
 
+    /* Variables for interrupt status */
+    bool interruptPending;
+    bool clearInterrupt;
+
   private:
     class TickEvent : public Event
     {
diff -r ecc66717b9f8 -r 3c76e843bd13 src/cpu/o3/cpu.cc
--- a/src/cpu/o3/cpu.cc	Fri Dec 30 18:30:23 2011 -0600
+++ b/src/cpu/o3/cpu.cc	Fri Dec 30 18:30:39 2011 -0600
@@ -165,6 +165,8 @@
     : BaseO3CPU(params),
       itb(params->itb),
       dtb(params->dtb),
+      interruptPending(false),
+      clearInterrupt(true),
       tickEvent(this),
 #ifndef NDEBUG
       instcount(0),
diff -r ecc66717b9f8 -r 3c76e843bd13 src/cpu/o3/fetch.hh
--- a/src/cpu/o3/fetch.hh	Fri Dec 30 18:30:23 2011 -0600
+++ b/src/cpu/o3/fetch.hh	Fri Dec 30 18:30:39 2011 -0600
@@ -329,7 +329,8 @@
     bool
     checkInterrupt(Addr pc)
     {
-        return (interruptPending && (THE_ISA != ALPHA_ISA || !(pc & 0x3)));
+        return (cpu->interruptPending && (!cpu->clearInterrupt) &&
+                (THE_ISA != ALPHA_ISA || !(pc & 0x3)));
     }
 
     /** Squashes a specific thread and resets the PC. */
@@ -537,11 +538,6 @@
     /** Thread ID being fetched. */
     ThreadID threadFetched;
 
-    /** Checks if there is an interrupt pending.  If there is, fetch
-     * must stop once it is not fetching PAL instructions.
-     */
-    bool interruptPending;
-
     /** Is there a drain pending. */
     bool drainPending;
 
diff -r ecc66717b9f8 -r 3c76e843bd13 src/cpu/o3/fetch_impl.hh
--- a/src/cpu/o3/fetch_impl.hh	Fri Dec 30 18:30:23 2011 -0600
+++ b/src/cpu/o3/fetch_impl.hh	Fri Dec 30 18:30:39 2011 -0600
@@ -148,7 +148,6 @@
       retryTid(InvalidThreadID),
       numThreads(params->numThreads),
       numFetchingThreads(params->smtNumFetchingThreads),
-      interruptPending(false),
       drainPending(false),
       switchedOut(false),
       finishTranslationEvent(this)
@@ -509,7 +508,6 @@
     wroteToTimeBuffer = false;
     _status = Inactive;
     switchedOut = false;
-    interruptPending = false;
     branchPred.takeOverFrom();
 }
 
@@ -907,16 +905,6 @@
 
     DPRINTF(Fetch, "Running stage.\n");
 
-    #if FULL_SYSTEM
-    if (fromCommit->commitInfo[0].interruptPending) {
-        interruptPending = true;
-    }
-
-    if (fromCommit->commitInfo[0].clearInterrupt) {
-        interruptPending = false;
-    }
-#endif
-
     for (threadFetched = 0; threadFetched < numFetchingThreads;
          threadFetched++) {
         // Fetch each of the actively fetching threads.