MEM: Pass the ports from Python to C++ using the Swig params
Review Request #1002 - Created Jan. 17, 2012 and submitted - Latest diff uploaded
| Information | |
|---|---|
| Andreas Hansson | |
| gem5 | |
| default | |
| Reviewers | |
| Default | |
MEM: Pass the ports from Python to C++ using the Swig params This patch adds basic information about the ports in the parameter classes to be passed from the Python world to the corresponding C++ object. Currently, the only information passed is the number of connected peers, which for a Port is either 0 or 1, and for a VectorPort reflects the size of the VectorPort. The default port of the bus had to be renamed to avoid using the name "default" as a field in the parameter class. It is possible to extend the Swig'ed information further and add e.g. a pair with a description and size.
util/regress all passing (disregarding t1000 and eio)
