Review Board 2.0.15


CPU: Fix switching in of x86 CPU with interrupt and TLB ports

Review Request #1062 - Created Feb. 24, 2012 and discarded

Information
Andreas Hansson
gem5
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Reviewers
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CPU: Fix switching in of x86 CPU with interrupt and TLB ports

This patch fixes the, currently broken, switching of CPUs for x86 by
ensuring that the interrupt device does not initialise the ports if
the CPU is not connected, and also ensures that the TLB walker ports
of the new CPU are actually connected. To do the latter the getPort of
the TLB and TLB walker for x86 were added to override the BaseTLB that
returns NULL.
util/regress all passing (disregarding t1000 and eio)
Review request changed
Updated (Feb. 28, 2012, 6:34 p.m.)

Status: Discarded