Atomic: Remove the physmem_port and access memory directly

Information
Submitter:	Andreas Hansson
Repository:	gem5
Branch:	default
Bugs:
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Description

Atomic: Remove the physmem_port and access memory directly

This patch removes the physmem_port from the Atomic CPU and instead
uses the system pointer to access the physmem when using the fastmem
option. The system already keeps track of the physmem and the valid
memory address ranges, and with this patch we merely make use of that
existing functionality. As a result of this change, the overloaded
getMasterPort in the Atomic CPU can be removed, thus unifying the CPUs.

Testing Done

util/regress all passing (disregarding t1000 and eio), 
also running se.py and fs.py with --fastmem

Andreas, can this same functionality not implemented while retaining the
port abstraction? I mean, why do we do we prefer using the system pointer
for accessing physical memory? Even if the system has multiple different
memories, can we not have a single port that has access to all those
memories?

It might be that I am asking questions asked earlier by others.

Andreas Hansson March 20, 2012, 3:50 a.m. (March 20, 2012, 3:50 a.m.)

We already have that functionality in place through the actual "real" interconnect, i.e. connecting all the masters in the system to the memories, with address decoding in the interconnect. The fastmem option is just a way to avoid going through the memory system. If we make fastmem use a port then essentially we end up with a shadow interconnect next to the normal one (with address decoding etc).

Andreas Hansson April 1, 2012, 4:23 a.m. (April 1, 2012, 4:23 a.m.)
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Are you happy with this Nilay?
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Nilay Vaish April 1, 2012, 6:55 a.m. (April 1, 2012, 6:55 a.m.)
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I am fine with the patch.
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Ship It!

Ship It!

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Status: Closed (submitted)