CPU: Merge the predecoder and decoder.
Review Request #1195 - Created May 14, 2012 and submitted
| Information | |
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| Gabe Black | |
| gem5 | |
| default | |
| Reviewers | |
| Default | |
Changeset 9023:ea2094694097 --------------------------- CPU: Merge the predecoder and decoder. These classes are always used together, and merging them will give the ISAs more flexibility in how they cache things and manage the process.
Issue Summary
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Posted (May 20, 2012, 8:20 a.m.)
In general I'm in agreement with this direction (as we've already discussed, but I just wanted to be clear about it). I'm curious why functions like extMachInstReady() and getExtMachInst() are still public... ideally I'd think that the ExtMachInst type(s) would now be entirely internal to the Decoder objects, and their definitions (not to mention their very existence) would be invisible to the CPU models.
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src/cpu/checker/cpu_impl.hh (Diff revision 1) -
This function name "extMachInstReady()" seems wrong, since the ExtMachInst is not visible outside the Decoder (right?)
Posted (May 20, 2012, 10:44 a.m.)
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src/cpu/checker/cpu_impl.hh (Diff revision 1) -
Why aren't we skipping the ExtMachInst completely here, and just doing instPtr = thread->decoder.decode(pcState) ?
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src/cpu/inorder/resources/fetch_unit.cc (Diff revision 1) -
same comment as above... this function name makes no sense in the modified context where the code doesn't mention extMachInst otherwise
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src/cpu/legiontrace.cc (Diff revision 1) -
the concept of "extMachInst" is meaningless now, so this function name doesn't make sense in context. should it be decoderReady() or something like that?
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src/cpu/o3/fetch_impl.hh (Diff revision 1) -
similar thing here... how is !extMachInstReady() at this point different from needMoreBytes()? The latter sounds more intuitively like what you want to call based on the name of the flag.
Review request changed
Updated (May 24, 2012, 8:33 p.m.)
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Revision 2 (+1320 -1747) |
Thanks for the changes!
Posted (May 26, 2012, 7:17 a.m.)
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src/cpu/checker/cpu_impl.hh (Diff revision 2) -
My only concern with the Checker code is: does getName() have a chance for aliasing between instructions with slightly different binary representations but have the same mnemonic? Otherwise removing the dependency on machInst allows the Checker to be more easily adapted to checking other ISAs besides ARM.
