Checker: Fix checker CPU ports

Information
Submitter:	Andreas Hansson
Repository:	gem5
Branch:	default
Bugs:
Depends On:
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Groups:	Default
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Description

Changeset 9168:5ac3ca2456dd
---------------------------
Checker: Fix checker CPU ports

This patch updates how the checker CPU handles the ports such that the
regressions will once again run without causing a panic.

A minor amount of tidying up was also done as part of this patch.

Testing Done

Ran the failing realview-o3-checker regression with stats from next patch

Issue Summary

Description	From	Last Updated	Status
oops	Ali Saidi	Aug. 25, 2012, 3:34 p.m.	Resolved
assert icache Port?	Ali Saidi	Aug. 25, 2012, 3:34 p.m.	Resolved
seems like these asserts are backwards	Ali Saidi	Aug. 25, 2012, 3:34 p.m.	Resolved

src/cpu/checker/cpu.hh (Diff revision 1)

oops

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Andreas Hansson Aug. 25, 2012, 3:04 p.m. (Aug. 25, 2012, 3:04 p.m.)
```
That's what happens when you are on dodgy X session over 3G :)
```

src/cpu/checker/cpu.hh (Diff revision 1)

assert icache Port?

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Andreas Hansson Aug. 25, 2012, 3:04 p.m. (Aug. 25, 2012, 3:04 p.m.)

Both will do. I guess I am used to the old-school SPARC machines where NULL was 0x4 instead of 0x0...I'm not sure we have to design for that though. Will bump

src/cpu/checker/cpu.hh (Diff revision 1)

seems like these asserts are backwards

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Description:

~		Changeset 9168:8bc6ce06d039
	~	Changeset 9168:5ac3ca2456dd

		Checker: Fix checker CPU ports

		This patch updates how the checker CPU handles the ports such that the
		regressions will once again run without causing a panic.

		A minor amount of tidying up was also done as part of this patch.

Diff:

Revision 2 (+21 -19)

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	src/cpu/checker/cpu.hh
	src/cpu/checker/cpu.cc

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Issue Summary

Description:

Changeset 9168:8bc6ce06d039

Changeset 9168:5ac3ca2456dd

Diff:

Status: Closed (submitted)