mem: Add tTAW and tFAW to the SimpleDRAM model
Review Request #1588 - Created Dec. 6, 2012 and submitted
| Information | |
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| Andreas Hansson | |
| gem5 | |
| default | |
| Reviewers | |
| Default | |
Changeset 9496:8c0369668d7c --------------------------- mem: Add tTAW and tFAW to the SimpleDRAM model This patch adds two additional scheduling constraints to the DRAM controller model, to constrain the activation rate. The two metrics are determine the size of the activation window in terms of the number of activates and the minimum time required for that number of activates. This maps to current DDRx, LPDDRx and WIOx standards that have either tFAW (4 activate window) or tTAW (2 activate window) scheduling constraints.
util/regress all passing (disregarding t1000 and eio)
Posted (Dec. 7, 2012, 5:36 a.m.)
seems fine except that actTIcks could be an stl container and the number of activates per time window could become configurable
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src/mem/simple_dram.hh (Diff revision 1) -
stl::list?
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src/mem/simple_dram.cc (Diff revision 1) -
with a stl list this could just be actTicks.push_front(0); actTicks.pop_back();
Review request changed
Updated (Jan. 22, 2013, 2:59 a.m.)
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Revision 2 (+70 -13) |
Ship It!