mem: Fix bugs in the PageTable cache that allow accessing uninitialized data
Review Request #1830 - Created April 19, 2013 and submitted
| Information | |
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| Mitch Hayenga | |
| gem5 | |
| Reviewers | |
| Default | |
Fixes two bugs relating to software caching of PageTable entries. The existing implementation can read uninitialized data or stale information from the cached PageTable entries. 1) Add a valid bit for the cache entries. Simply using zero for the virtual address to signify invalid entries is not sufficient. Speculative, wrong-path accesses frequently access page zero. The current implementation would return a uninitialized TLB entry when address zero was accessed and the PageTable cache entry was invalid. 2) When unmapping/mapping/remaping a page, invalidate the corresponding PageTable cache entry if one already exists.
Issue Summary
| Description | From | Last Updated | Status |
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| I would suggest calling this eraseEntry eraseCacheEntry as it does not erase the entire cache. | Andreas Hansson | April 19, 2013, 9:41 p.m. | Open |
Change Summary:
Modified remap and map to also invalidate the page table cache if need be.
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Diff: |
Revision 2 (+30 -7) |
LGTM. How does it affect the regressions?
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src/mem/page_table.hh (Diff revision 2) -
I would suggest calling this eraseEntry eraseCacheEntry as it does not erase the entire cache.
Cool! I wonder if this is what causes the long SE regressions to change a little bit every so often. I agree with Andreas' name suggestion, but otherwise thanks! How did you figure it out?
Change Summary:
Ok, fixed things up. Changed function name to eraseCache to eraseCacheEntry. The ARM/quick/se regressions still pass, but I haven't tried any others. PS: Someone else will have to push this.
Diff: |
Revision 3 (+30 -7) |
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i'll push it shortly.
