mem: Align cache timing to clock edges
Review Request #1895 - Created June 4, 2013 and submitted
| Information | |
|---|---|
| Andreas Hansson | |
| gem5 | |
| default | |
| Reviewers | |
| Default | |
Changeset 9745:58e6081c3e49 --------------------------- mem: Align cache timing to clock edges This patch changes the cache timing calculations such that the results are aligned to clock edges. Plenty stats change as a results of this patch.
All regressions pass after stats updates
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Posted (June 13, 2013, 12:53 a.m.)
Are we relying on pkt->bus{First,Last}WordDelay to be a multiple of the cache clock period? Of course that would normally be the case if the cache and bus are on the same clock, and I'm sure there are many things we get wrong if they're not, but it seems to be it would be safer to have those terms inside the call to clockEdge() as well. Unless there's a good reason that they're not... if so, please enlighten me.
Ship It!
