cpu: add a condition-code register class
Review Request #1988 - Created Aug. 21, 2013 and submitted
| Information | |
|---|---|
| Steve Reinhardt | |
| gem5 | |
| default | |
| Reviewers | |
| Default | |
Changeset 9851:27064c03d2c8 --------------------------- cpu: add a condition-code register class Add a third register class for condition codes, in parallel with the integer and FP classes. No ISAs use the CC class at this point though.
Posted (Aug. 27, 2013, 8:43 a.m.)
I might have asked you this before. Do the processor designs that are out there in the market have separate condition code register file?
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src/cpu/o3/cpu.cc (Diff revision 1) -
Is this #ifdef required? When NumCCRegs maps to zero, the loop is not executed.
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src/cpu/o3/cpu.cc (Diff revision 1) -
Do we use this code? From a cursory look, it seems that this code is required for context switching in SE mode. Should we not just drop all of it?
