Review Board 2.0.15


cpu: add a condition-code register class

Review Request #1988 - Created Aug. 21, 2013 and submitted

Information
Steve Reinhardt
gem5
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Reviewers
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Changeset 9851:27064c03d2c8
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cpu: add a condition-code register class

Add a third register class for condition codes,
in parallel with the integer and FP classes.
No ISAs use the CC class at this point though.

   

Issue Summary

2 0 1 1
Review request changed
Updated (Oct. 16, 2013, 8:14 a.m.)

Status: Closed (submitted)