Yes, the intent here is to have a performance model that's equivalent to every int reg having an associated set of flags, without the major surgery that would be required to have the O3 model actually implement that.  Really all that matters is that the number of physical integer registers is the only constraint on renaming, and you never have to stall because you ran out of physical CC regs while there were still physical int regs available.

To answer your question on the other review, I don't know of any commercial processors that explicitly rename CC regs as a separate resource, but I haven't kept up with all the details (e.g., some of the high-end SPARCs from Fujitsu might conceivably do this).  I think this code would support that model as well, if anyone wanted to test it out.