mem: Just-in-time write scheduling in DRAM controller
Review Request #2052 - Created Oct. 16, 2013 and submitted
| Information | |
|---|---|
| Andreas Hansson | |
| gem5 | |
| default | |
| Reviewers | |
| Default | |
Changeset 9923:d621cbc86079 --------------------------- mem: Just-in-time write scheduling in DRAM controller This patch removes the untimed while loop in the write scheduling mechanism and now schedule commands taking into account the minimum timing constraint. It also introduces an optimization to track write queue size and switch from writes to reads if the number of write requests fall below write low threshold.
All regressions pass (with stats update)
