Review Board 2.0.15


Different cache latency for read and write access

Review Request #2072 - Created Oct. 29, 2013 and discarded - Latest diff uploaded

Information
Sophiane SENNI
gem5
Reviewers
Default
This patch allows specifying different cache latency for read and write access. (In the code, the hit_latency parameter is actually the read_latency)
I used --debug-flags command to check read hit latency and write hit latency for Dcache and Icache. I checked the time between a request sent by the cpu and the response sent by the cache memory.