config, x86: Ensure that PCI devs get bridged to the memory bus

Information
Submitter:	Jiuyue Ma
Repository:	gem5
Branch:
Bugs:
Depends On:
Blocks:	2301
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Description

config, x86: Ensure that PCI devs get bridged to the memory bus

This patch force IO device to be mapped to 0xC0000000-0xFFFF0000 by
reserve anything between the end of memory and 3GB if memory is less
than 3GB. It also statically bridge these address range to the IO bus,
which guaranty access to pci address space will pass though bridge to
iobus.

Testing Done

Issue Summary

Description	From	Last Updated	Status
What if it is 2 or above? Seems things will break?	Andreas Hansson	July 17, 2014, 2:36 a.m.	Dropped

Thanks for fixing this!

The changeset looks good, but I'd appreciate if you could shorten the summary line (the first line) of the commit message to comply with the commit requirements (http://www.gem5.org/Commit_Access). The maximum line length for the summary line is 65 characters.

Something like this should suffice as a summary line:
"config, x86: Ensure that PCI devs get bridged to the memory bus"

Other than the above, I'm happy to have this committed.

Jiuyue Ma July 17, 2014, 2:40 a.m. (July 17, 2014, 2:40 a.m.)
```
summary line fixed :)
```

configs/common/FSConfig.py (Diff revision 1)

What if it is 2 or above? Seems things will break?

Show all issues

Jiuyue Ma July 17, 2014, 2:40 a.m. (July 17, 2014, 2:40 a.m.)

For memory large than 3GB, memory will be split into two parts: [0, 3GB] and [4GB, ...].
This have already make sure IO devices to be mapped in [3GB, 4GB].

Andreas Hansson July 17, 2014, 2:41 a.m. (July 17, 2014, 2:41 a.m.)
```
Ok, thanks for the clarification.
```

Change Summary:

change summary line to meet gem5 commit requirements

Summary:

-	config: force IO devices mapped to 0xC0000000-0xFFFF0000 and bridge these address to iobus for x86
+	config, x86: Ensure that PCI devs get bridged to the memory bus

Description:

~		config: force IO devices mapped to 0xC0000000-0xFFFF0000 and bridge these address to iobus for x86
	~	config, x86: Ensure that PCI devs get bridged to the memory bus

		This patch force IO device to be mapped to 0xC0000000-0xFFFF0000 by
		reserve anything between the end of memory and 3GB if memory is less
		than 3GB. It also statically bridge these address range to the IO bus,
		which guaranty access to pci address space will pass though bridge to
		iobus.

Diff:

Revision 2 (+18 -9)

Show changes

configs/common/FSConfig.py

LGTM.

The concern raised by Andreas doesn't really apply here as x86 already makes the assumption that there are 1 or 2 memory ranges (see for example the assert on near the top of makeLinuxX86System, line 500, in FSConfig.py). In the long term, we probably want to get rid of that assumption.

Ship It!

Andreas Hansson July 17, 2014, 5:26 a.m. (July 17, 2014, 5:26 a.m.)

I think this should be combined with http://reviews.gem5.org/r/2302/ such that any address that is now forwarded to the iobus, but not actually used is sent to a badaddr responder.

You have a pending review.

Review Board 2.0.15

This change has been marked as submitted.

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Issue Summary

Change Summary:

Summary:

Description:

Diff:

Status: Closed (submitted)