sim: stopgap for race-conditions when using multiple EventQueues
Review Request #2320 - Created Aug. 1, 2014 and updated - Latest diff uploaded
| Information | |
|---|---|
| Martin Brown | |
| gem5 | |
| default | |
| Reviewers | |
| Default | |
Changeset 10264:c3977836244e --------------------------- sim: stopgap for race-conditions when using multiple EventQueues This patch fixes several race conditions that appear in multi- threaded mode. Currently the decode cache race condition is fixed only for x86, and in a temporary non-optimal fashion. We still need to decide on a more optimal solution for the decode cache and apply it to all the ISAs.
- Quick regression tests on x86, arm, alpha - Made sure that sparc, power, mips can be built with this patch - Tested using up to 28 EventQueues (28 threads)
