Nice catch! Looks like this could have been tricky to track down.

Minor requested change below, but otherwise, this looks ready to go.

src/mem/ruby/slicc_interface/AbstractController.cc (Diff revision 1)

Since this is currently only known to apply to writes, it should be moved to within the isWrite() conditional body (~line 311). No need to apply it to reads, since it seems like that could cause future problems.

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1. Jason Lowe-Power Feb. 9, 2015, 1:59 p.m. (Feb. 9, 2015, 1:59 p.m.)

   Good catch. In fact, I'll do you one better and assert that it's true for reads. If the controller returns a non cache-block aligned value here it causes major problems in all current protocols.