arch, cpu: Do not forward snoops to table walker

Information
Submitter:	Andreas Hansson
Repository:	gem5
Branch:	default
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Description

Changeset 10782:71d9c075bef2
---------------------------
arch, cpu: Do not forward snoops to table walker

This patch simplifies the overall CPU by changing the TLB caches such
that they do not forward snoops to the table walker port(s). Note that
only ARM and X86 are affected.

There is no reason for the ports to snoop as they do not actually take
any action, and from a performance point of view we are better of not
snooping more than we have to.

Should it at a later point be required to snoop for a particular TLB
design it is easy enough to add it back.

Testing Done

Are these the only two ISAs that should be changed? Why not the others?

Also, it might be worth mentioning in the commit message that it would be easy enough to add snooping back in for a particular TLB design if it were ever actually needed. Just further justification for why this change makes sense.

Andreas Hansson March 31, 2015, 12:23 a.m. (March 31, 2015, 12:23 a.m.)

Only ARM and X86 actually have table walkers (with a port exposed in the system). Hence, I do not see what I would change for the others.

I'll update the commit message as suggested.

Steve Reinhardt March 31, 2015, 9:35 a.m. (March 31, 2015, 9:35 a.m.)
```
Good answer :).  Thanks.
```

Description:

~		Changeset 10782:a138e84cc998
	~	Changeset 10782:71d9c075bef2

		arch, cpu: Do not forward snoops to table walker

		This patch simplifies the overall CPU by changing the TLB caches such
~		that they do not forward snoops to the table walker port(s).
	~	that they do not forward snoops to the table walker port(s). Note that
	+	only ARM and X86 are affected.

		There is no reason for the ports to snoop as they do not actually take
		any action, and from a performance point of view we are better of not
		snooping more than we have to.
	+
	+	Should it at a later point be required to snoop for a particular TLB
	+	design it is easy enough to add it back.

Diff:

Revision 2 (+3 -42)

Show changes

	configs/common/Caches.py
	configs/common/O3_ARM_v7a.py
	src/arch/arm/stage2_mmu.hh
	src/arch/x86/pagetable_walker.hh

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Description:

Changeset 10782:a138e84cc998

Changeset 10782:71d9c075bef2

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Status: Closed (submitted)