ruby: Fix for stallAndWait bug
Review Request #2805 - Created May 11, 2015 and submitted
| Information | |
|---|---|
| Tony Gutierrez | |
| gem5 | |
| default | |
| Reviewers | |
| Default | |
Changeset 10835:e6fd9419eacf --------------------------- ruby: Fix for stallAndWait bug It was previously possible for a stalled message to be reordered after an incomming message. This patch ensures that any stalled message stays in its original request order.
Issue Summary
| Description | From | Last Updated | Status |
|---|---|---|---|
| Is this necessary with auto in C++11? On second thought, it doesn't seem to be used in the patch anyway. | Jason Lowe-Power | May 12, 2015, 2:36 p.m. | Open |
| Unused typedef | Nilay Vaish | May 12, 2015, 2:39 p.m. | Open |
| You need to explain why a message buffer may get analyzed twice. I am guessing this is because of the ... | Nilay Vaish | May 12, 2015, 2:39 p.m. | Open |
| Why is this change right? Why can we move messages from one structure to another in zero time? | Nilay Vaish | May 15, 2015, 8:07 a.m. | Open |
| I think you should use curTick(). Using clockEdge() to schedule an even for the current tick implicitly assumes that reanalyzeMessages ... | Joel Hestness | June 4, 2015, 7:21 a.m. | Open |
| Same as last comment. | Joel Hestness | June 4, 2015, 7:21 a.m. | Open |
| Since you're modifying the line, can you also fix the whitespace. | Joel Hestness | June 4, 2015, 7:21 a.m. | Open |
Other than the small change below, LGTM.
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src/mem/ruby/network/MessageBuffer.hh (Diff revision 1) -
Is this necessary with auto in C++11?
On second thought, it doesn't seem to be used in the patch anyway.
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src/mem/ruby/network/MessageBuffer.hh (Diff revision 1) -
Unused typedef
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src/mem/ruby/slicc_interface/AbstractController.cc (Diff revision 1) -
You need to explain why a message buffer may get analyzed twice. I am guessing this is because of the other patch where in you allow for multiple message types in the same buffer. My guess is that it should be ok to call reanalyze twice as long as you empty the wait buffer.
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src/mem/ruby/network/MessageBuffer.cc (Diff revision 1) -
Why is this change right? Why can we move messages from one structure to another in zero time?
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Diff: |
Revision 2 (+23 -12) |
Any more comments on this patch?
I think I'm ok with this change (though I agree with Nilay that this could be implemented in a much cleaner way with std::list, which can preserve order).
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src/mem/ruby/network/MessageBuffer.cc (Diff revision 2) -
I think you should use curTick(). Using clockEdge() to schedule an even for the current tick implicitly assumes that reanalyzeMessages will always be called on a clock edge so that clockEdge() returns the current tick. If reanalyzeMessages is not called on a clock edge, clockEdge() returns the first tick of the next cycle, which reintroduces delays. This is likely to reintroduce the bug (if I'm reading this correctly).
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src/mem/ruby/network/MessageBuffer.cc (Diff revision 2) -
Same as last comment.
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src/mem/ruby/network/MessageBuffer.cc (Diff revision 2) -
Since you're modifying the line, can you also fix the whitespace.
