kvm, arm, dev: Add an in-kernel GIC implementation

Information
Submitter:	Andreas Sandberg
Repository:	gem5
Branch:	default
Bugs:
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Description

Changeset 10849:378ad81e9acd
---------------------------
kvm, arm, dev: Add an in-kernel GIC implementation

This changeset adds a GIC implementation that uses the kernel's
built-in support for simulating the interrupt controller. Since there
is currently no support for state transfer between gem5 and the
kernel, the device model does not support serialization and CPU
switching (which would require switching to a gem5-simulated GIC).

Testing Done

Tested with the gem5's aarch64 kvm implementation (see separate review request). Boots Linux and interacts nicely with the interactive console. Note: The kernel requires simulated devices to be well behaved and clear interrupts. This means that the PCI IDE device model doesn't work. Use the VirtIO block device instead.

src/cpu/kvm/vm.hh (Diff revision 1)

Should this go in a different file?

Andreas Sandberg May 22, 2015, 9:34 a.m. (May 22, 2015, 9:34 a.m.)

Yes, it probably should. I'll fix that before committing. Do you want me to repost the patch?

Just curious what is the usage scenario for this, it seems that it can be used to interrupt the VM even if there is no physical interrupt.

Andreas Sandberg May 22, 2015, 9:34 a.m. (May 22, 2015, 9:34 a.m.)

The usage scenario for this is cases where we can't use the IO-mapped timer and have to rely on the kernel doing register-mapped timer emulation (we can't intercept timer control registers in gem5). At the moment, that means that we also rely on the kernel emulating the interrupt controller. This exeuction mode is typically useful for userspace bringup with a kernel that doesn't support memory-mapped timers (a lot of old kernel have issues with these).

Description:

~		Changeset 10849:d59f9d2d90f7
	~	Changeset 10849:378ad81e9acd

		kvm, arm, dev: Add an in-kernel GIC implementation

		This changeset adds a GIC implementation that uses the kernel's
		built-in support for simulating the interrupt controller. Since there
		is currently no support for state transfer between gem5 and the
		kernel, the device model does not support serialization and CPU
		switching (which would require switching to a gem5-simulated GIC).

Diff:

Revision 2 (+618 -2)

Show changes

	src/arch/arm/kvm/KvmGic.py
	src/arch/arm/kvm/SConscript
	src/arch/arm/kvm/gic.hh
	src/arch/arm/kvm/gic.cc
	src/cpu/kvm/SConscript
	src/cpu/kvm/device.hh
	src/cpu/kvm/device.cc
	src/cpu/kvm/vm.hh
	1 more

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Description:

Changeset 10849:d59f9d2d90f7

Changeset 10849:378ad81e9acd

Diff:

Status: Closed (submitted)