ruby: call setMRU from L1 controllers, not from sequencer
Review Request #2981 - Created July 19, 2015 and submitted
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| Nilay Vaish | |
| gem5 | |
| default | |
| Reviewers | |
| Default | |
Changeset 11002:86776d8b9a7d --------------------------- ruby: call setMRU from L1 controllers, not from sequencer Currently the sequencer calls the function setMRU that updates the replacement policy structures with the first level caches. While functionally this is correct, the problem is that this requires calling findTagInSet() which is an expensive function. This patch removes the calls to setMRU from the sequencer. All controllers should now update the replacement policy on their own. The set and the way index for a given cache entry can be found within the AbstractCacheEntry structure. Use these indicies to update the replacement policy structures.
I'm still pretty ambivalent about this change. There are now 4 potential ways to update MRU: (1) direct call from an action to a cache's setMRU, (2)/(3) calling an action from a transition that updates a specific cache's MRU, and (4) calling an action from a transition that updates the MRU of all caches. This seems quite fragile and could result in all kinds of very difficult-to-debug performance problems.
I feel that we should modify some more with the aim of keeping replacement policy updates within actions that call hit callbacks. This might mean adding actions that are specific to I- vs. D-caches, but it would limit the number of calls to CacheMemory::setMRU() as well as the number of potentially sneaky performance bugs.
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src/mem/protocol/MESI_Three_Level-L0cache.sm (Diff revision 1) -
Can you consistently capitalize 'MRU' in these?
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src/mem/protocol/MESI_Three_Level-L0cache.sm (Diff revision 1) -
It would be helpful if these names were a little more verbose. Perhaps sm_setBothCacheMRU, uic_setICacheMRU and udc_setDCacheMRU? Maybe even use more consistent action ID tags?
This comment applies to all modified protocols.
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src/mem/protocol/MOESI_CMP_token-L1cache.sm (Diff revision 1) -
In this file, it appears that sm_setMruCache is only ever called from before x_external_load_hit and xx_external_store_hit. Can we just move the MRU updates into those actions instead?
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Revision 2 (+154 -8) |
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Revision 3 (+118 -41) |
Nilay said
It takes about 50ns per call to findTagInSet (on the machine I use). All
those times when the line is found in the first level cache, we would not
those extra calls. Overall, a simulation would be about 2% faster.I personally don't think that 2% performance is worth the likelyhood that users' protocols will be broken. A change like this one was exactly the kind of thing I talked about in my workshop presentation. This change may cause significant headaches for gem5 users. My personal opinion is that 2% performance isn't worth it.
I think that we should only include this change if most of the community wants to move setMRU into the L1 controllers, instead of being implicit for the L1s, as it is now. If we do decide to move this way, I think we need to broadcast the change loudly. One option is to set the implicit version as deprecated and print warnings if the cache lines are not explicitly setMRU. We could have one version of gem5 stable with the warning, then the next gem5 stable can remove the warning and move to requiring explicit use of setMRU in the L1 controllers.
Also, Nilay, to echo Brad's previous requests, could you please respond to things on reviewboard. Reviewboard is where most people go to see the whole conversation. By responding via email it makes it very difficult for anyone to follow the conversation.
This is a lot better. Thanks for these changes.
I agree that we need to broadcast this change loudly since it will result in silent performance bugs in non-mainline protocols.
Can you please comment on the testing you did to ensure performance correctness of mainline protocols?
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src/mem/ruby/system/Sequencer.cc (Diff revision 3) -
Could you please add a warn_once() here that states "Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!"?
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src/mem/ruby/system/Sequencer.cc (Diff revision 3) -
Can m_instCache_ptr be removed now? Doesn't look like it's being used elsewhere.
