cpu: Change thread assignents for heterogenous SMT

Information
Submitter:	Curtis Dunham
Repository:	gem5
Branch:	default
Bugs:
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Description

Trying to run an SE system with varying threads per core (SMT cores + Non-SMT
cores) caused failures due to the CPU id assignment logic.  The comment
about thread assignment (worrying about core 0 not having tid 0) seems
not to be valid given that our configuration scripts initialize them in
order.

This removes that constraint so a heterogenously threaded sytem can work.

Testing Done

src/sim/system.hh (Diff revision 1)

Not sure I understand why this is needed, it seems one can already figure out if it is a multi-threaded system configured by checking numThreads.

Mitch Hayenga Aug. 12, 2015, 12:33 p.m. (Aug. 12, 2015, 12:33 p.m.)

This is needed to determine if the system contains heterogenously-threaded cores (and changes how we do the thread id assignment on ARM). Just detecting if a CPU has 1 thread is not sufficient if other, multi-threaded cores in the system may exist.

You have a pending review.

Review Board 2.0.15

This change has been marked as submitted.

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Status: Closed (submitted)