misc: Bugfix in TLM memInhibit Command

Information
Submitter:	Abdul Mutaal Ahmad
Repository:	gem5
Branch:
Bugs:
Depends On:
Reviewers
Groups:	Default
People:

Description

memInhibitAsserted() has been removed from packet.hh. This change has been reflected in TLM based SystemC memory

Testing Done

Issue Summary

Description	From	Last Updated	Status
The transactor should also not see any clean evicts.	Andreas Hansson	March 21, 2016, 4:09 a.m.	Resolved
I'd add this for atomic as well.	Andreas Hansson	March 21, 2016, 4:07 a.m.	Resolved

After pushing the patch that moves the point of coherency to the CoherentXBar we should probably update this to match the code in bridge.cc.

Abdul Mutaal Ahmad March 11, 2016, 2:23 a.m. (March 11, 2016, 2:23 a.m.)

when is that patch expected to be pushed? if it is already there, can you please share here.

Andreas Hansson March 11, 2016, 5:24 a.m. (March 11, 2016, 5:24 a.m.)

It was pushed a few weeks ago and you can have a look at e.g. bridge.cc for a suitable check. In essence all coherency traffic should stop in the CoherentXBar and never reach the TLM adapter.

Change Summary:

Updated handling of memInhibit request

Diff:

Revision 2 (+9 -3)

Show changes

util/tlm/sc_port.cc

util/tlm/sc_port.cc (Diff revision 2)

The transactor should also not see any clean evicts.

Show all issues

Abdul Mutaal Ahmad March 14, 2016, 5:02 a.m. (March 14, 2016, 5:02 a.m.)
```
so I need to drop this line as well
```
Andreas Hansson March 19, 2016, 9:11 a.m. (March 19, 2016, 9:11 a.m.)
```
I'd suggest to copy&paste the panics from bridge.cc
```
Abdul Mutaal Ahmad March 19, 2016, 10:52 a.m. (March 19, 2016, 10:52 a.m.)
```
That is the only panic in bridge.cc
```