cpu: Add a SynchroTrace replay model
Review Request #3687 - Created Oct. 26, 2016 and updated - Latest diff uploaded
| Information | |
|---|---|
| Curtis Dunham | |
| gem5 | |
| default | |
| Reviewers | |
| Default | |
cpu: Add a SynchroTrace replay model
SynchroTrace's trace replay is a 1-CPI timing model that interfaces with
the multi-threaded traces from Sigil to inject traffic into the detailed
memory model. The high-level description of the execution flow is in
src/cpu/testers/synchrotrace/SynchroTrace.hhThe following is included in this patch:
* The main SynchroTrace trace replay file
* SynchroTrace parser file which processes Sigil Traces into
SynchroTrace events
* A front-end python configuration script with a default two-level
cache hierarchy.Change-Id: I6c89894d95974d838bc9ee3b9e468a4032f6613a
