Review Board 2.0.15


cpu: split o3-specific parts out of BaseDynInst

Review Request #529 - Created March 1, 2011 and updated - Latest diff uploaded

Information
Korey Sewell
gem5
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Reviewers
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ali, gblack, nate, stever
cpu: split o3-specific parts out of BaseDynInst
The bigger picture goal is that I want to get the InorderDynInst class derived from the
BaseDynInst, since there is no need to replicate a lot of useful code already defined
in BaseDynInst (e.g. microcode identification, etc.) and Inorder can take advantage
of common code that handles microcode and other features that other ISAs need.

But to do this, there are a lot of o3-specific things that are in BaseDynInst, that I pushed to
O3DynInst in this patch. Book-keeping variables that handle the IQ,LSQ,ROB are unnecessary in
the base class but generic variables that will work across CPUs (IsSquashed, IsCompleted, etc.)
are kept in the base class.

The upside is more consistency across the simple models (branch prediction and instruction
identification are all in one common place).

I really wanted to define pure virtual functions for read/write(to memory) and the
set<Int/Float>RegOperand, but virtual functions in a templated class is a no-no and
I couldn't get around that (suggestions?).

Also, I'd rather not use the "this->" pointer all over the place to access member variables of
the templated Base class, but it had to be done.

Other than those quirks, simulator functionality should stay the same as the O3 Model always references
the O3DynInst pointer and the InOrder model doesnt currently make use of the base dyn inst. class.
(but it will be easier to derive from now...)