Review Board 2.0.15


ARM: Identify branches as conditional or unconditional and direct or indirect.

Review Request #570 - Created March 11, 2011 and submitted

Information
Ali Saidi
gem5
Reviewers
Default
ali, gblack, nate, stever
ARM: Identify branches as conditional or unconditional and  direct or indirect.

   
Posted (March 11, 2011, 8:16 a.m.)



  
src/cpu/o3/bpred_unit_impl.hh (Diff revision 1)
 
 
Does this snippet not do the same thing as the commented code below?

Also, I'm wondering how this code worked before now, because this is the function called whenever a branch is resolved but formerly it only checked the most recent prediction.
src/cpu/o3/bpred_unit_impl.hh (Diff revision 1)
 
 
Shouldn't we also just panic here since if this condition is true, the the simulation is pretty much broke right?
Posted (March 11, 2011, 10:42 a.m.)



  
src/cpu/o3/bpred_unit_impl.hh (Diff revision 1)
 
 
The commented out code didn't work for some reason, although I agree it probably should have.

As for how it worked before, you tell me.. you committed it. Somehow we got incredibly lucky and in between the instruction getting to decode, no other branches were fetched and put in the pred_hist. 
src/cpu/o3/bpred_unit_impl.hh (Diff revision 1)
 
 
Yea, we could panic here instead of asserting.
Posted (March 11, 2011, 11:11 a.m.)



  
src/arch/arm/isa/insts/branch.isa (Diff revision 1)
 
 
The ternary operator here seems redundant since rounding down the ARM pc would be a nop. Beyond that, there should be a space after the comma and before the 4.
src/arch/arm/isa/insts/branch.isa (Diff revision 1)
 
 
Why the triple quotes?
src/arch/arm/predecoder.hh (Diff revision 1)
 
 
This is the size fix I was talking about before, I'm pretty sure. This should make the RFE microcode change you posted before unnecessary.
Posted (March 11, 2011, 11:21 a.m.)



  
src/arch/arm/isa/insts/branch.isa (Diff revision 1)
 
 
I'll see if that works... seems like it should.
src/arch/arm/isa/insts/branch.isa (Diff revision 1)
 
 
i'll change it to a single
src/arch/arm/predecoder.hh (Diff revision 1)
 
 
i'll look, but I'm not sure that it does. I'm pretty sure it still causes a mispredict without it.
  1. Ok, yeah, I looked at it more carefully just now. I think all you need to do is check whether the size is set on the pc already, and if so don't update the npc or the size. In those cases the pc will have already been set up by the predecoder with a valid npc. If it comes back that way, the npc may have an updated value and shouldn't be overwritten.
Posted (March 11, 2011, 11:37 a.m.)



  
src/cpu/o3/bpred_unit_impl.hh (Diff revision 1)
 
 
OK, I just looked at this again.

The reason the code works is that before it gets to this part of the code, the BPUnit calls a generic squash that will take care of all branches after this (I guess that's why I left the comment above that line saying squash AFTER this ...)

It's not lucky so to speak, because the only thing left at the top of the prediction history is the actual squashing instruction and it *should* be OK to not have to search through the prediction history list here (phew!). 

Regrettably, I left the DPRINTF there preceding the assert because it's real annoying if you break at that point in the code and the assert doesnt give you enough information to trace the problem. 

However, I guess that's mostly a development issue so it's probably the right thing to do is WACK all of that code and leave in a assert or panic at that spot ensuring that the seqNum is the prediction history at the front.

Are you seeing cases where you have to search through the list there to get the branch prediction right?
Posted (March 11, 2011, 12:10 p.m.)



  
src/arch/arm/predecoder.hh (Diff revision 1)
 
 
That would solve the general case, but I still don't think it fixes rfe safely. If a load faults you could still end taking the fault with part of the rfe observed which would be incorrect behavior. 
src/cpu/o3/bpred_unit_impl.hh (Diff revision 1)
 
 
Yea i was, that is why I changed it, but I can verify that it wasn't some other bug
  1. I'm not going to make any changes to the bpred_unit_impl.hh file... Apparently I fixed the issue I was having somewhere else.