Review Board 2.0.15


CPU: Add some useful debug message to the timing simple cpu.

Review Request #671 - Created May 2, 2011 and submitted

Information
Ali Saidi
gem5
Reviewers
Default
ali, gblack, nate, stever 
CPU: Add some useful debug message to the timing simple cpu.

   

  


 


 

  

  









  
 


  

 


















 

  


 


  



   

   
Gabe Black

   
Posted  (May 2, 2011, 9:54 a.m.)


  


  


  

   
Generally speaking, I'd like to see us move towards using the same traceflags across ISAs and CPUs. If I'm using the SimpleCPU, being able to select DPRINTFs specific to the SimpleCPU isn't that useful. I'm not going to hit an O3 DPRINTF whether I have them turned on or not. Instead, it might be better to, say, use a Fetch traceflag to go with Fetch actions. Then you can be more specific and have to remember fewer particulars of the thing you're working with. You could have a compound traceflag called SimpleCPU (or just CPU?) which would turn on all the basics. It might get a little tricky if you have multiple CPU types and wanted to turn on only the ones in the SimpleCPU, but I expect that to be relatively uncommon.

I'd encourage you to think about changing things around like this, but I understand it expands the scope of what you were trying to do significantly. I'm ok if you leave it as is.



  

   

   
    
    

   
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    I'm on board with having traceflags mean the same across CPU models.

The answer to this is to have compound trace flags be able to contain other compound trace flags. 
(Nate says his new changes will allow this, so cross your fingers!)

If you do this, then that means we can define the Fetch traceflag to mean:
Fetch: SimpleCPUFetch,O3Fetch,InOrderFetch

and then the CPU models can define what are the relevant flags appropriately.


    
    
    
   
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Ship it!



   

   
Korey Sewell

   
Posted  (May 3, 2011, 3:29 p.m.)


  


  


  

   
I'd love the compound trace flags and consolidation of flags across models but until that happens...Ship!