Review Board 2.0.15


Mem: Fix issue with prefetches originating at non-L1 caches getting stale data

Review Request #787 - Created July 13, 2011 and submitted

Information
Ali Saidi
gem5
Reviewers
Default
ali, gblack, nate, stever
Mem: Fix issue with prefetches originating at non-L1 caches getting stale data

Prefetch requests issued from the L2 or below wouldn't check if valid data is
present higher in the system. If a prefetch into the L2 occured at the same
time as writeback from a higher-level cache the dirty data could be replaced
in by unmodified data in memory.

   
Review request changed
Updated (July 13, 2011, 7:41 a.m.)
Ship it!
Posted (July 13, 2011, 10:26 a.m.)
I spotted two minor non-functional things that could be polished, but basically this looks fine.  Thanks for the effort on fixing this.
src/mem/cache/cache_impl.hh (Diff revision 2)
 
 
I think you can get rid of this assert since the new if clause covers that case.
src/mem/cache/cache_impl.hh (Diff revision 2)
 
 
I'd change "we could get a copy from a lower level or main memory that isn't dirty and it might replace a dirty one in cache if the upper level happens to write back in the middle of a prefetch" to "we could get a stale copy from memory that might get used in place of the dirty one"... you're mentioning one specific symptom but I suspect that's not the only one, so the shorter comment should suffice.