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[Submitted] base: Add wrapped protobuf output streams
|
ahansson
|
December 6th, 2012, 7:51 p.m.
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[Submitted] cpu: Add support for protobuf input for the trace generator
|
ahansson
|
December 6th, 2012, 7:58 p.m.
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[Submitted] mem: Remove the joining of neighbouring ranges
|
ahansson
|
December 6th, 2012, 8:01 p.m.
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[Submitted] cpu: Share the send functionality between traffic generators
|
ahansson
|
December 6th, 2012, 7:59 p.m.
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[Submitted] base: Encapsulate the underlying fields in AddrRange
|
ahansson
|
October 30th, 2012, 8:57 a.m.
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[Submitted] mem: Tidy up bus addr range debug messages
|
ahansson
|
November 1st, 2012, 1:49 a.m.
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[Submitted] mem: Skip address mapper range checks to allow more flexibility
|
ahansson
|
December 6th, 2012, 8:02 p.m.
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[Submitted] config: Do not use hardcoded physmem in fs script
|
ahansson
|
December 6th, 2012, 8:36 p.m.
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[Submitted] config: Traverse lists when visiting children in all proxy
|
ahansson
|
December 6th, 2012, 8:08 p.m.
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[Submitted] mem: Add interleaving bits to the address ranges
|
ahansson
|
December 6th, 2012, 8:09 p.m.
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[Submitted] mem: Merge ranges that are part of the conf table
|
ahansson
|
December 6th, 2012, 8:16 p.m.
|
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[Submitted] dev: Make the ethernet devices use a non-zero clock
|
ahansson
|
December 6th, 2012, 8:18 p.m.
|
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[Submitted] o3: FIx issue with LLSC ordering and speculation
|
ali
|
December 6th, 2012, 11:45 a.m.
|
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[Submitted] arch: Make the ISA class inherit from SimObject
|
ali
|
October 24th, 2012, 3:04 p.m.
|
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[Submitted] scons: Enforce gcc >= 4.4 or clang >= 2.9 and c++0x support
|
ali
|
December 6th, 2012, 11:51 a.m.
|
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[Submitted] sim: Fatal if a clocked object is set to have a clock of 0
|
ahansson
|
December 6th, 2012, 8:26 p.m.
|
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[Submitted] tests: Create base classes to encapsulate common test configurations
|
ali
|
December 6th, 2012, 11:44 a.m.
|
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[Submitted] cpu: Fix broken squashAfter implementation in O3 CPU
|
ali
|
December 6th, 2012, 12:05 p.m.
|
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[Submitted] cpu: Fix broken thread context handover
|
ali
|
December 6th, 2012, 12:13 p.m.
|
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[Submitted] cpu: Unify the serialization code for all of the CPU models
|
ali
|
December 6th, 2012, 12:33 p.m.
|
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[Submitted] cpu: Rewrite O3 draining to avoid stopping in microcode
|
ali
|
December 6th, 2012, 12:23 p.m.
|
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[Submitted] cpu: Make sure that a drained timing CPU isn't executing ucode
|
ali
|
December 6th, 2012, 12:16 p.m.
|
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[Submitted] cpu: Make sure that a drained atomic CPU isn't executing ucode
|
ali
|
December 6th, 2012, 12:21 p.m.
|
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[Submitted] cpu: Rename defer_registration->switched_out
|
ali
|
December 6th, 2012, 12:03 p.m.
|
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[Submitted] cpu: Correctly call parent on switchOut() and takeOverFrom()
|
ali
|
December 6th, 2012, 11:59 a.m.
|
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[Submitted] tests: Add CPU switching tests
|
ali
|
December 6th, 2012, 12:30 p.m.
|
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[Submitted] tests: Add support for skipping tests, skip EIO tests if not enabled
|
ali
|
December 6th, 2012, 12:01 p.m.
|
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|
[Submitted] cpu: Unify SimpleCPU and O3 CPU serialization code
|
ali
|
December 6th, 2012, 11:58 a.m.
|
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|
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[Submitted] arch: Move the ISA object to a separate section
|
ali
|
December 6th, 2012, 11:53 a.m.
|
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|
|
[Submitted] scons: Remove stale compiler options
|
ali
|
December 6th, 2012, 11:50 a.m.
|
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|
[Submitted] base: Create a central header listing all signals used within gem5
|
ali
|
November 2nd, 2012, 10:09 a.m.
|
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|
[Submitted] ARM: Make ID registers ISA parameters
|
ali
|
October 24th, 2012, 3:05 p.m.
|
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|
[Submitted] cpu: rename the misleading inSyscall to noSquashFromTC
|
ali
|
December 6th, 2012, 11:45 a.m.
|
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|
|
[Submitted] cpu: Initialize the O3 pipeline from startup()
|
ali
|
December 6th, 2012, 11:56 a.m.
|
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|
|
[Submitted] mem: Remove the IIC replacement policy
|
ali
|
November 2nd, 2012, 10:10 a.m.
|
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|
|
[Discarded] Config: Move Ruby Objs to RubySystem in obj hierarchy
|
musleh
|
January 3rd, 2013, 9:57 p.m.
|
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|
|
Config: Instantiate Interrupt Controller for run.py
|
musleh
|
December 30th, 2012, 8:22 p.m.
|
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|
[Submitted] x86: implement x87 fp instruction fnstsw
|
nilay
|
December 12th, 2012, 10:03 p.m.
|
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|
|
[Submitted] ARM: Set "movret_uop" as Conditional or Unconditional control
|
npremill
|
November 7th, 2012, 9:27 a.m.
|
|
|
|
[Submitted] ARM: Set "uopSet_uop" as Conditional or Unconditional control
|
npremill
|
October 6th, 2012, 3:35 p.m.
|
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|
|
[Submitted] ruby: modify the directed tester to read/write streams
|
nilay
|
October 24th, 2012, 12:39 p.m.
|
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|
|
[Submitted] ruby: change slicc to allow for constructor args
|
nilay
|
October 24th, 2012, 12:38 p.m.
|
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|
|
[Submitted] ruby: add support for prefetching to MESI protocol
|
nilay
|
October 24th, 2012, 12:39 p.m.
|
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|
|
[Submitted] ruby: add functions for computing next stride/page address
|
nilay
|
October 24th, 2012, 12:37 p.m.
|
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|
|
[Submitted] ruby: add a prefetcher
|
nilay
|
October 24th, 2012, 12:37 p.m.
|
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|
|
[se] Initialize Linux' default code and data segments
|
vilanova
|
September 26th, 2012, 8:34 a.m.
|
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|
|
[Submitted] Ruby Config: Add Argument for marking caches as Inst Only - MESI/MOESI
|
musleh
|
October 24th, 2012, 8:18 a.m.
|
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|
|
[Submitted] InOrderCPU: Add Missing DPRINTF Argument to Fetch Unit
|
musleh
|
October 31st, 2012, 8:11 a.m.
|
|
|
|
[Submitted] O3: remove some unused buggy functions in the lsq (numLoadsReady)
|
npremill
|
August 17th, 2012, 7:20 a.m.
|
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|
|
[Submitted] TournamentBP: Fix some bugs with table sizes and counters
|
erik.t
|
October 29th, 2012, 3:50 a.m.
|
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