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ARM: Fix Uncachable TLB requests and decoding of xn bit

Review Request #189 - Created Aug. 13, 2010 and submitted

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Ali Saidi
gem5
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ARM: Fix Uncachable TLB requests and decoding of xn bit

   
Posted (Aug. 19, 2010, 2:58 a.m.)



  
src/arch/arm/table_walker.hh (Diff revision 1)
 
 
As you know, we generally don't like magic bits randomly placed.  Is there no more centralized location that you can spell out what all of the bits are?  (I can accept NO as an answer.
Posted (Aug. 19, 2010, 3:12 a.m.)



  
src/arch/arm/table_walker.hh (Diff revision 1)
 
 
The bit is described by the function name that grabs it. I don't see much benefit to having an enum of bit descriptions and then having bool xn() {const return bits(data, xnBit);
}
This becomes more difficult for the functions that grab bits from three different places. 

Honenstly i don't think it adds anything to clarity and we're 100% sure these are right now and they won't need to change. 
  1. Ok, if this is the only place that they're used, I'm fine with it.
  2. What you're building here looks a lot like a bitunion, although not quite. I'd like to add the capability to add functions and computed bitfields so you could, say, grab a field from a register which is split into multiple parts without gluing them together yourself or do some common transformation like it looks like your doing, but it wasn't obvious how to make that fit cleanly. I'm sure it can be done, but the syntax seemed a little clunky which sort of defeats the purpose. This might be something to revisit if I get that figured out.