x86, o3: Enabling x86 TLBs for multiple hardware threads
Review Request #2852 - Created May 28, 2015 and updated - Latest diff uploaded
| Information | |
|---|---|
| Alexandru Dutu | |
| gem5 | |
| default | |
| Reviewers | |
| Default | |
Changeset 10860:f4565ce598dd
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x86, o3: Enabling x86 TLBs for multiple hardware threads
This patch extends the x86 TLB to be shared among multiple hardware threads.
Its size will represent the total number of TLB entries that can be allocated
to all threads.
Quick regressions passed for all ISAs.