Review Board 2.0.15


sim: Fix clock_domain unserialization

Review Request #3350 - Created Feb. 25, 2016 and submitted - Latest diff uploaded

Information
Curtis Dunham
gem5
default
Reviewers
Default
sim: Fix clock_domain unserialization

This patch addresses an issue with the unserialization of clock
domains. Previously, the previous performance level was not restored
due to a bug in the code, which detected the post-unserialize update
as superfluous. This patch splits the setting of the clock domain into
two parts. The original interface of perfLevel is retained, but the
actual update takes place in signalPerLevelUpdate, which is private to
the class. The perfLevel method checks that if the new performance
level is different to the previous performance level, and will only
call signalPerLevelUpdate if there is a change. Therefore, the
performance level is only updated, and voltage domains notified, if
there is an actual change. The split functionality allows
signalPerLevelUpdate to be called by startup() to explicitly force an
update post unserialization.