config, mem: add command-line options for L2 MSHR queue size and hit latency
Review Request #3495 - Created June 3, 2016 and updated - Latest diff uploaded
| Information | |
|---|---|
| Rodrigo Cataldo | |
| gem5 | |
| 3506 | |
| Reviewers | |
| Default | |
Add two new command-line options for the classic memory system: L2 MSHR queue size and hit latency.
Default values of these options were based on the config/common/Caches.pyIn addition, add basic help text for all cache-related command-line options (l1d-size, num-dirs, etc) and clarify if they are intended for both memory system or limited to a specific system.
Help text for parameters --smt, --etherdump and --is-switch were updated to the new line limit (79 chars).
Executed successfully bodytrack/simmedium and canneal/simmedium (PARSEC benchmarks) for the ARM ISA.
Experimented with: Hit latencies of 4, 10, 20ns and MSHR queue size of 6, and 20.Results available here: http://tinyurl.com/mshr-hl