misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/10]

Information
Submitter:	Christian Menard
Repository:	gem5
Branch:	default
Bugs:
Depends On:	~~3695~~
Blocks:	3777
Reviewers
Groups:	Default
People:

Description

Changeset 11798:3a490c57058d

---------------------------

misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/10]
The current TLM bridge only provides a Slave Port that allows the gem5 world to

send request to the SystemC world. This patch series refractors and cleans up

the existing code, and adds a Master Port that allows the SystemC world to send

requests to the gem5 world.
This patch:

 * Introduce transactor modules that represent the gem5 ports in the SystemC

   world.

 * Update the SimControl module and let it keep track of the gem5 ports.

Testing Done

Description:

~		misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/6]
	~	Changeset 11798:4c4e3dd82558
	+	---------------------------
	+	misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/6]

		The current TLM bridge only provides a Slave Port that allows the gem5 world to
		send request to the SystemC world. This patch series refractors and cleans up
		the existing code, and adds a Master Port that allows the SystemC world to send
		requests to the gem5 world.

		This patch:
		* Introduce transactor modules that represent the gem5 ports in the SystemC
		world.
		* Update the SimControl module and let it keep track of the gem5 ports.

Diff:

Revision 2 (+509 -114)

Show changes

	util/tlm/master_transactor.hh
	util/tlm/master_transactor.cc
	util/tlm/sc_master_port.hh
	util/tlm/sc_master_port.cc
	util/tlm/sc_slave_port.hh
	util/tlm/sc_slave_port.cc
	util/tlm/sim_control.hh
	util/tlm/sim_control.cc
	7 more

Description:

~		Changeset 11798:4c4e3dd82558
	~	misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/6]
-		---------------------------
-		misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/6]

		The current TLM bridge only provides a Slave Port that allows the gem5 world to
		send request to the SystemC world. This patch series refractors and cleans up
		the existing code, and adds a Master Port that allows the SystemC world to send
		requests to the gem5 world.

		This patch:
		* Introduce transactor modules that represent the gem5 ports in the SystemC
		world.
		* Update the SimControl module and let it keep track of the gem5 ports.

Description:

~		misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/6]
	~	Changeset 11798:dfab50bb946b
	+	---------------------------
	+	misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/6]

		The current TLM bridge only provides a Slave Port that allows the gem5 world to
		send request to the SystemC world. This patch series refractors and cleans up
		the existing code, and adds a Master Port that allows the SystemC world to send
		requests to the gem5 world.

		This patch:
		* Introduce transactor modules that represent the gem5 ports in the SystemC
		world.
		* Update the SimControl module and let it keep track of the gem5 ports.

Diff:

Revision 3 (+509 -114)

Show changes

	util/tlm/master_transactor.hh
	util/tlm/master_transactor.cc
	util/tlm/sc_master_port.hh
	util/tlm/sc_master_port.cc
	util/tlm/sc_slave_port.hh
	util/tlm/sc_slave_port.cc
	util/tlm/sim_control.hh
	util/tlm/sim_control.cc
	7 more

I have one small remark:

in the file run_gem5.sh, this:

--tlm-memory=memory                                     \

should be this:

--tlm-memory=transactor                                     \

Regards
Matthias

Christian Menard Feb. 2, 2017, 3:26 a.m. (Feb. 2, 2017, 3:26 a.m.)
```
Fixed this.
```

Description:

~		Changeset 11798:dfab50bb946b
	~	Changeset 11798:3a490c57058d
		---------------------------
		misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/6]

		The current TLM bridge only provides a Slave Port that allows the gem5 world to
		send request to the SystemC world. This patch series refractors and cleans up
		the existing code, and adds a Master Port that allows the SystemC world to send
		requests to the gem5 world.

		This patch:
		* Introduce transactor modules that represent the gem5 ports in the SystemC
		world.
		* Update the SimControl module and let it keep track of the gem5 ports.

Diff:

Revision 4 (+510 -115)

Show changes

	util/tlm/master_transactor.hh
	util/tlm/master_transactor.cc
	util/tlm/sc_master_port.hh
	util/tlm/sc_master_port.cc
	util/tlm/sc_slave_port.hh
	util/tlm/sc_slave_port.cc
	util/tlm/sim_control.hh
	util/tlm/sim_control.cc
	8 more

Ship It!

Summary:

-	misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/6]
+	misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/10]

Description:

		Changeset 11798:3a490c57058d
		---------------------------
~		misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/6]
	~	misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/10]

		The current TLM bridge only provides a Slave Port that allows the gem5 world to
		send request to the SystemC world. This patch series refractors and cleans up
		the existing code, and adds a Master Port that allows the SystemC world to send
		requests to the gem5 world.

		This patch:
		* Introduce transactor modules that represent the gem5 ports in the SystemC
		world.
		* Update the SimControl module and let it keep track of the gem5 ports.

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Status: Closed (submitted)