ARM: Remove the saturating (Q) condition code from the renamed register.
Review Request #680 - Created May 4, 2011 and submitted
| Information | |
|---|---|
| Ali Saidi | |
| gem5 | |
| Reviewers | |
| Default | |
| ali, gblack, nate, stever | |
ARM: Remove the saturating (Q) condition code from the renamed register. Move the saturating bit (which is also saturating) from the renamed register that holds the flags to the CPSR miscreg and adds a allows setting it in a similar way to the FP saturating registers. This removes a dependency in instructions that don't write, but need to preserve the Q bit.
Posted (May 8, 2011, 4:48 p.m.)
You need to be careful here since miscregs won't forward results back to later instructions. Anything that depends on the q bit (and by extension the CPSR as a whole) needs to wait for all earlier instructions to complete before executing. I didn't see anything in this change that handles that, but it may have already been in there for some other reason.