MIPS InorderCPU branch problems
Review Request #744 - Created June 12, 2011 and discarded - Latest diff uploaded
| Information | |
|---|---|
| Deyuan Guo | |
| gem5 | |
| Reviewers | |
| Default | |
| ali, gblack, nate, stever | |
We are porting gem5 to support MIPS64, and find some problems. We try to fix them, as shown below: 1. fetch_seq_unit.cc Comment 2 lines. pc shouldn't be changed at this condition; 2. branch_predictor.cc Comment 1 line. By default, set target to NPC is OK. Adding a condition for MIPS branch likely instruction. 3. bpred_unit.cc If the branch is not taken, BTB should not be updated. In addition, 2 places in src/arch/mips/isa/formats/branch.isa: elif x == 'Likely': # not_taken_code = 'NNPC = NPC, NPC = PC;' The not_taken_code should be commented.
We have run many benchmarks of MIPS64 in gem5. And for MIPS32, with CPU_MODELS=InOrderCPU, hello world run correctly.
