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[Submitted] arm: Rewrite ERET to behave according to the ARMv8 ARM
|
andysan
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May 27th, 2016, 2:09 p.m.
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[Submitted] arm: Remove BreakPCEvent on guest kernel panic
|
andysan
|
April 1st, 2016, 2:43 p.m.
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[Submitted] arm: Refactor the TLB test interface
|
andysan
|
March 8th, 2016, 2:04 p.m.
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[Submitted] arm: Get rid of pointless have_generic_timer param
|
andysan
|
May 7th, 2015, 11 a.m.
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[Submitted] arm: Fix compilation error in m5 utility
|
andysan
|
May 7th, 2013, 5:42 a.m.
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[Discarded] arm: DT autogeneration - Device Tree generation methods
|
andysan
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March 17th, 2016, 3:21 p.m.
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[Submitted] arm: Don't report the boot ROM as a memory in config tables
|
andysan
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July 22nd, 2016, 3:04 p.m.
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[Submitted] arm: Correctly check translation mode (aarch64/aarch32)
|
andysan
|
May 27th, 2016, 2:01 p.m.
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[Submitted] arm: Correctly check FP/SIMD access permission in aarch32
|
andysan
|
May 27th, 2016, 2:04 p.m.
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[Submitted] arm: Clean up m5ops assembly library
|
andysan
|
March 17th, 2016, 10:44 a.m.
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[Submitted] arm: Bootloader fix for v8 over 16 cores
|
andysan
|
November 20th, 2015, 8:26 p.m.
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[Submitted] arm: Add support for the m5fail pseudo-op
|
andysan
|
May 7th, 2013, 5:42 a.m.
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[Submitted] arm: Add support for programmable oscillators
|
andysan
|
July 7th, 2015, 4 p.m.
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[Submitted] arm: Add support for automatic boot loader selection
|
andysan
|
November 18th, 2015, 12:08 p.m.
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[Submitted] arm, dev: Add support for listing DMA ports in new platforms
|
andysan
|
July 22nd, 2016, 3:05 p.m.
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[Submitted] arm, dev: Add support for a memory mapped generic timer
|
andysan
|
May 7th, 2015, 11 a.m.
|
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[Submitted] arm, config: Fixups for the example big.LITTLE(tm) configuration
|
andysan
|
July 12th, 2016, 7:16 a.m.
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[Submitted] arm, config: Automatically discover available platforms
|
andysan
|
November 24th, 2015, 2:08 p.m.
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[Submitted] arm, config: Add initial support for Ruby
|
andysan
|
July 22nd, 2016, 3:06 p.m.
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[Discarded] arch: Use ASI 0xFF instead of bit 63 to for generic IPRs
|
andysan
|
October 3rd, 2013, 1:21 p.m.
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[Submitted] arch: Include generated decoder header after normal headers
|
andysan
|
February 21st, 2017, 6:55 p.m.
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[Submitted] arch: Create a method to finalize physical addresses in the TLB
|
andysan
|
May 2nd, 2013, 3:17 a.m.
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[Submitted] arch: Add support for m5ops using mmapped IPRs
|
andysan
|
September 20th, 2013, 1:15 p.m.
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arch, cpu: Architectural Register structural indexing
|
andysan
|
April 28th, 2016, 11:56 a.m.
|
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gpu-compute: Changed stat name for AMD architecture
|
apattnai
|
May 16th, 2016, 9:29 p.m.
|
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x86: Fix SMT support (zeroReg, TLBs)
|
apellegr
|
June 29th, 2012, 3:15 p.m.
|
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[Submitted] o3: Clarify meaning of cachePorts variable in lsq_unit.hh
|
aperais
|
April 26th, 2016, 12:42 p.m.
|
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[Submitted] cpu: Resolve targets of predicted 'taken' conditional direct branches at decode (o3)
|
aperais
|
November 17th, 2016, 10:29 a.m.
|
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[Submitted] cpu: implement L-TAGE branch predictor
|
aperais
|
November 22nd, 2016, 2:31 p.m.
|
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[Submitted] cpu: disallow speculative update of the conditional branch predictor tables (o3)
|
aperais
|
November 18th, 2016, 3:14 p.m.
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[Submitted] cpu: change comments in tournament branch predictor to reflect what the code does
|
aperais
|
November 18th, 2016, 12:41 p.m.
|
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arm: Implement store-pair (aarch64) as a single micro-op
|
aperais
|
January 26th, 2016, 9 p.m.
|
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[Submitted] riscv: [Patch 8/5] Added some regression tests to RISC-V
|
aroelke
|
November 3rd, 2016, 7:36 p.m.
|
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[Submitted] riscv: [Patch 7/5] Corrected LRSC semantics
|
aroelke
|
November 2nd, 2016, 7:34 p.m.
|
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[Submitted] riscv: [Patch 6/5] Improve Linux emulation for RISC-V
|
aroelke
|
October 14th, 2016, 6:17 p.m.
|
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[Submitted] riscv: [Patch 5/5] Added missing support for timing CPU models
|
aroelke
|
September 19th, 2016, 8:14 p.m.
|
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[Submitted] riscv: [Patch 4/5] Added RISC-V atomic memory extension RV64A
|
aroelke
|
September 19th, 2016, 7:41 p.m.
|
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[Submitted] riscv: [Patch 3/5] Added RISCV floating point extensions RV64FD
|
aroelke
|
September 19th, 2016, 7:26 p.m.
|
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[Submitted] riscv: [Patch 2/5] Added RISC-V multiply extension RV64M
|
aroelke
|
September 19th, 2016, 7:12 p.m.
|
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[Submitted] riscv: Remove ECALL tests from insttest
|
aroelke
|
January 12th, 2017, 9:18 p.m.
|
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[Submitted] riscv: Fix crash when syscall argument reg index is too high
|
aroelke
|
January 12th, 2017, 9 p.m.
|
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[Submitted] arch: [Patch 1/5] Added RISC-V base instruction set RV64I
|
aroelke
|
September 14th, 2016, 10:45 p.m.
|
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[Submitted] x86: x86 instruction-implementation bug fixes
|
atgutier
|
May 11th, 2015, 10:18 p.m.
|
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x86: fix Mul1u instruction
|
atgutier
|
February 2nd, 2017, 12:32 a.m.
|
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[Submitted] x86: fix issue with casting in Cvtf2i
|
atgutier
|
November 17th, 2016, 8:54 p.m.
|
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[Submitted] x86, sim: add some syscalls to X86
|
atgutier
|
July 22nd, 2016, 3:58 p.m.
|
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[Submitted] x86, ext: fix buf overflow in fp80 ops; pad fp80_t in fputils
|
atgutier
|
October 28th, 2016, 10:42 p.m.
|
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[Submitted] util: added .mk makefile extension to file_types.py
|
atgutier
|
May 11th, 2015, 10:18 p.m.
|
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[Submitted] util: added .cl OpenCL extension to file_type.py
|
atgutier
|
May 11th, 2015, 10:18 p.m.
|
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[Submitted] syscall_emul: don't check host fd when allocating target fd
|
atgutier
|
October 30th, 2015, 9:52 p.m.
|
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