Review Board 2.0.15


All Review Requests

Summary Submitter Posted
Last Updated
cpu: o3: remove unused stat variables.
nilay
February 28th, 2015, 10:40 p.m.
cpu: o3: combine if with same condition
nilay
February 28th, 2015, 10:39 p.m.
cpu: o3: remove member variable squashCounter
nilay
February 28th, 2015, 10:37 p.m.
cpu: o3: remove unused function annotateMemoryUnits()
nilay
February 28th, 2015, 10:34 p.m.
x86: implements x87 mult/div instructions
nilay
February 28th, 2015, 10:34 p.m.
config: Specify OS type and release on command line
ahansson
February 23rd, 2015, 2:15 p.m.
mem: Fix cache MSHR conflict determination
ahansson
February 23rd, 2015, 1:05 p.m.
[Discarded] config: Add --sst configuration option
cdunham
February 20th, 2015, 6:47 p.m.
config: Support full-system with SST's memory system
cdunham
February 20th, 2015, 6:47 p.m.
ext: Add SST connector
cdunham
February 20th, 2015, 6:47 p.m.
config: Add ability to exit simulation after initialization
cdunham
February 20th, 2015, 6:46 p.m.
sim: Reuse the same limit_event in simulate()
cdunham
February 20th, 2015, 6:46 p.m.
mem: Add byte mask to Packet::checkFunctional
ahansson
February 19th, 2015, 7:56 a.m.
mem: Add option to force in-order insertion in PacketQueue
ahansson
February 19th, 2015, 7:56 a.m.
mem: Downstream components consumes new crossbar delays
ahansson
February 19th, 2015, 7:55 a.m.
mem: Move crossbar default latencies to subclasses
ahansson
February 19th, 2015, 7:55 a.m.
mem: Add crossbar latencies
ahansson
February 19th, 2015, 7:55 a.m.
dev, arm: Clean up PL011 and rewrite interrupt handling
ahansson
February 19th, 2015, 7:55 a.m.
arm: Share a port for the two table walker objects
ahansson
February 19th, 2015, 7:55 a.m.
cpu: Add a PC-value to the traffic generator requests
ahansson
February 19th, 2015, 7:55 a.m.
tests: Run regression timeout as foreground
ahansson
February 19th, 2015, 7:55 a.m.
config: Fix for 'android' lookup in disk name
rizwanab
February 13th, 2015, 9:10 p.m.
mem: Fix prefetchSquash + memInhibitAsserted bug
ahansson
February 13th, 2015, 8:36 a.m.
[Discarded] Ruby: Fix a bug when issuing unaligned writes to memory
powerjg
February 9th, 2015, 8:23 p.m.
dev: Fix undefined behaviuor in i8254xGBe
ahansson
February 9th, 2015, 2:24 p.m.
cache: remove redundant test in recvTimingResp()
stever
February 9th, 2015, 6:05 a.m.
cache: add local var in recvTimingResp()
stever
February 9th, 2015, 6:05 a.m.
mem: restructure Packet cmd initialization a bit more
stever
February 8th, 2015, 10:34 p.m.
cpu: o3 register renaming request handling improved
ahansson
February 7th, 2015, 5:24 p.m.
mem: Split port retry for all different packet classes
ahansson
February 7th, 2015, 5:24 p.m.
syscall_emul: fix warning with wrong syscall name and nix extra whitespace
bpotter
February 6th, 2015, 10:07 p.m.
syscall_emul: update getrlimit to warn (instead of std::cerr) and return
bpotter
February 6th, 2015, 10:07 p.m.
syscall_emul: update x86 syscall table with additional definitions (through Linux 3.13)
bpotter
February 6th, 2015, 10:07 p.m.
syscall_emul: implement clock_gettime system call
bpotter
February 6th, 2015, 10:07 p.m.
base: add new ChunkGenerator method to identify last chunk
bpotter
February 6th, 2015, 10:03 p.m.
cpu: remove conditional check (count > 0) on o3 IQ squashes
bpotter
February 6th, 2015, 10:02 p.m.
config: optionally embed environment variables onto SE-mode application stack
bpotter
February 6th, 2015, 10:01 p.m.
mem: clean up write buffer check in Cache::handleSnoop()
stever
February 6th, 2015, 12:38 a.m.
[Discarded] mem: fix prefetcher bug regarding write buffer hits
stever
February 6th, 2015, 12:38 a.m.
mem: Clarification of packet crossbar timings
ahansson
February 5th, 2015, 12:52 p.m.
mem: Clarify usage of latency in the cache
ahansson
February 5th, 2015, 12:52 p.m.
base: Do not dereference NULL in CompoundFlag creation
ahansson
February 5th, 2015, 11:36 a.m.
style: Fix broken m5format command
ahansson
February 5th, 2015, 10:59 a.m.
style: Fix incorrect style checker option name
ahansson
February 5th, 2015, 10:59 a.m.
arm: Wire up the GIC with the platform in the base class
ahansson
February 5th, 2015, 10:59 a.m.
sim: Move the BaseTLB to src/arch/generic/
ahansson
February 5th, 2015, 10:59 a.m.
base: Add compiler macros to add deprecation warnings
ahansson
February 5th, 2015, 10:59 a.m.
Ruby: Update backing store option to propagate through to all RubyPorts
powerjg
February 4th, 2015, 11:31 p.m.
config: Add memcheck stress test
ahansson
February 3rd, 2015, 7:57 p.m.
mem: Fix initial value problem with MemChecker
ahansson
February 3rd, 2015, 7:57 p.m.
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