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[Submitted] arm, config: Add an example ARM big.LITTLE(tm) configuration script
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cdunham
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July 8th, 2016, 10:28 a.m.
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[Discarded] arm, config: Fixups for the example big.LITTLE(tm) configuration
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cdunham
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August 16th, 2016, 1:56 p.m.
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[Submitted] arm, kvm: Automatically use the MuxingKvmGic
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cdunham
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January 17th, 2017, 10:04 p.m.
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[Submitted] arm, kvm: implement MuxingKvmGic
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cdunham
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January 17th, 2017, 10:04 p.m.
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[Submitted] arm, kvm: remove KvmGic
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cdunham
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January 17th, 2017, 10:04 p.m.
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[Submitted] arm: Add AArch64 hypervisor call instruction 'hvc'
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cdunham
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June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Add check to fault routing for hypervisor/virtualization
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cdunham
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June 21st, 2016, 1:41 p.m.
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[Submitted] arm: add stage2 translation support
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cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Add TLBI instruction for stage 2 IPA's
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cdunham
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June 21st, 2016, 1:41 p.m.
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[Submitted] arm: bank GIC registers per CPU
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cdunham
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July 18th, 2016, 3:26 p.m.
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[Submitted] arm: change instruction classes to catch hyp traps
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cdunham
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June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Change TLB software caching
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cdunham
|
July 30th, 2015, 6:47 p.m.
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[Submitted] arm: Check TLB stage 2 permissions in AArch64
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cdunham
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June 21st, 2016, 1:41 p.m.
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[Submitted] arm: correctly assign faulting IPA's to HPFAR_EL2
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cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: enable EL2 support
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cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Fix EL perceived at TLB for address translation instructions
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cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Fix secure state checking in various places
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cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Fix stage 2 determination in table walker
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cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Fix stage 2 memory attribute checking in AArch64
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cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Fix trapping to Hypervisor during MSR/MRS read/write
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cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: invalidate TLB miscreg cache on modification of HSCTLR
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cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Refactor aarch64 table walk logic to remove redundancy
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cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: refactor page table walking
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cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: s/ctx_id/ctx/ the GIC
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cdunham
|
July 18th, 2016, 3:26 p.m.
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[Submitted] arm: Squash after returning from exceptions in v7
|
cdunham
|
February 10th, 2016, 12:04 a.m.
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[Submitted] arm: tweak MPIDR setting when using SMT
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cdunham
|
July 30th, 2015, 6:47 p.m.
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[Submitted] arm: warn not fail on use of missing miscreg CNTHCTL_EL2
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cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] base: Add total() to Vector2D stat
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cdunham
|
May 31st, 2016, 10:43 a.m.
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[Submitted] base: remove Trace::enabled flag
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cdunham
|
August 31st, 2015, 6:35 p.m.
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[Submitted] base: support gzip-compressed object files
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cdunham
|
September 21st, 2015, 11:42 p.m.
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[Submitted] config,cpu: Add SMT support to Atomic and Timing CPUs
|
cdunham
|
July 30th, 2015, 6:47 p.m.
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[Discarded] config: Add --sst configuration option
|
cdunham
|
February 20th, 2015, 6:47 p.m.
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[Submitted] config: Add ability to exit simulation after initialization
|
cdunham
|
February 20th, 2015, 6:46 p.m.
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[Submitted] config: Enable elastic trace capture and replay in se/fs
|
cdunham
|
August 11th, 2015, 9:05 p.m.
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[Submitted] config: Support full-system with SST's memory system
|
cdunham
|
February 20th, 2015, 6:47 p.m.
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[Submitted] cpu,isa,mem: Adds per-thread wakeup logic
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cdunham
|
July 30th, 2015, 6:47 p.m.
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cpu: Add a SynchroTrace replay model
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cdunham
|
October 26th, 2016, 11:04 p.m.
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[Submitted] cpu: Add an indirect branch target predictor
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cdunham
|
February 23rd, 2016, 8:58 p.m.
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[Submitted] cpu: Add instruction opclass histogram to minor
|
cdunham
|
February 23rd, 2016, 8:58 p.m.
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[Submitted] cpu: Add per-thread monitors
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cdunham
|
July 30th, 2015, 6:47 p.m.
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[Submitted] cpu: Add SMT support to MinorCPU
|
cdunham
|
February 23rd, 2016, 8:58 p.m.
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[Submitted] cpu: Add TraceCPU to playback elastic traces
|
cdunham
|
August 11th, 2015, 9:05 p.m.
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[Submitted] cpu: Change thread assignents for heterogenous SMT
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cdunham
|
July 30th, 2015, 6:46 p.m.
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[Submitted] cpu: Create record type enum for elastic traces
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cdunham
|
September 3rd, 2015, 4:17 p.m.
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[Submitted] cpu: Enforce 1 interrupt controller per thread
|
cdunham
|
October 5th, 2015, 6:52 p.m.
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[Submitted] cpu: Fix BTB threading oversight
|
cdunham
|
February 23rd, 2016, 8:58 p.m.
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[Submitted] cpu: Fix LLSC atomic CPU wakeup
|
cdunham
|
February 9th, 2016, 9:29 p.m.
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[Submitted] cpu: Fix Minor SMT WFI/drain interaction issues
|
cdunham
|
July 5th, 2016, 2 p.m.
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[Submitted] cpu: Implement per-thread GHRs
|
cdunham
|
February 23rd, 2016, 8:58 p.m.
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[Submitted] cpu: Query CPU for inst executed from Python
|
cdunham
|
March 4th, 2016, 11:03 p.m.
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