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[Submitted] mem: Add tRAS parameter to the DRAM controller model
|
ahansson
|
October 16th, 2013, 7:36 a.m.
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[Discarded] arch: support dynamic ISA file generation in SConscripts
|
ahansson
|
April 23rd, 2014, 12:23 p.m.
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[Submitted] dev, pci: Implement basic VirtIO support
|
ahansson
|
September 10th, 2014, 7:51 a.m.
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[Submitted] mem: Use shared_ptr for Ruby Message classes
|
ahansson
|
September 29th, 2014, 10:40 a.m.
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[Submitted] mem: Move crossbar default latencies to subclasses
|
ahansson
|
February 19th, 2015, 7:55 a.m.
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[Submitted] mem: Align all MSHR entries to block boundaries
|
ahansson
|
March 17th, 2015, 7:09 p.m.
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[Discarded] MEM: VirtualPorts are replaced with FSTranslatingProxys
|
ahansson
|
November 28th, 2011, 10:20 a.m.
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[Submitted] MEM: Split SimpleTimingPort into PacketQueue and ports
|
ahansson
|
February 27th, 2012, 2:29 a.m.
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[Submitted] Ruby: Ensure snoop requests are sent using sendTimingSnoopReq
|
ahansson
|
May 3rd, 2012, 11:22 a.m.
|
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[Submitted] Packet: Updated comments for src and dest fields
|
ahansson
|
May 23rd, 2012, 6:32 a.m.
|
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[Submitted] Port: Add isSnooping to slave port (asking master port)
|
ahansson
|
June 6th, 2012, 9:43 a.m.
|
|
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[Submitted] Clock: Rework clocks to avoid tick-to-cycle transformations
|
ahansson
|
July 26th, 2012, 5 a.m.
|
|
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[Submitted] mem: Do not alter cache block state on uncacheable snoops
|
ahansson
|
December 9th, 2015, 11:57 p.m.
|
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[Submitted] sim: Fatal if a clocked object is set to have a clock of 0
|
ahansson
|
December 6th, 2012, 8:26 p.m.
|
|
|
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[Submitted] mem: Separate waiting for the bus and waiting for a peer
|
ahansson
|
March 14th, 2013, 7:02 a.m.
|
|
|
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[Submitted] stats: Fix issue when printing 2D vectors
|
ahansson
|
July 16th, 2013, 7:44 a.m.
|
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[Submitted] config: Add a DRAM efficiency-sweep script
|
ahansson
|
March 7th, 2014, 11:38 p.m.
|
|
|
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[Submitted] scons: update SCons SWIG version check to 2.0.4
|
ahansson
|
April 23rd, 2014, 12:10 p.m.
|
|
|
|
[Submitted] mem: Add DRAM power states to the controller
|
ahansson
|
April 23rd, 2014, 12:34 p.m.
|
|
|
|
[Submitted] base: Replace the internal varargs stuff with C++11 constructs
|
ahansson
|
August 13th, 2014, 12:51 p.m.
|
|
|
|
[Submitted] arch: Cleanup unused ISA traits constants
|
ahansson
|
August 22nd, 2014, 8:17 a.m.
|
|
|
|
[Submitted] mem: Add a simple snoop counter per bus
|
ahansson
|
September 10th, 2014, 7:53 a.m.
|
|
|
|
[Submitted] scons: create dummy target to have SWIG generate C++ classes
|
ahansson
|
September 29th, 2014, 10:37 a.m.
|
|
|
|
[Submitted] mem: Add ExternalMaster and ExternalSlave ports
|
ahansson
|
September 29th, 2014, 10:46 a.m.
|
|
|
|
[Submitted] mem: Relax packet src/dest check and shift onus to crossbar
|
ahansson
|
November 17th, 2014, 6:17 a.m.
|
|
|
|
[Submitted] mem: Remove WriteInvalidate support
|
ahansson
|
November 25th, 2014, 9:48 a.m.
|
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|
|
[Submitted] config: Add --memchecker option
|
ahansson
|
December 12th, 2014, 5:45 p.m.
|
|
|
|
[Submitted] arm, dev: Add a NAND flash timing model
|
ahansson
|
March 27th, 2015, 1:56 p.m.
|
|
|
|
[Submitted] MEM: Make the RubyPort physMemPort a PioPort instead of M5Port
|
ahansson
|
January 18th, 2012, 2:35 a.m.
|
|
|
|
[Submitted] MEM: Separate snoops and normal memory requests/responses
|
ahansson
|
April 2nd, 2012, 6:49 a.m.
|
|
|
|
[Submitted] mem: Move cache_impl.hh to cache.cc
|
ahansson
|
August 13th, 2015, 8:29 p.m.
|
|
|
|
[Submitted] mem: Avoid setting markPending if not needed
|
ahansson
|
August 31st, 2015, 9:20 a.m.
|
|
|
|
[Submitted] mem: Clarify cache MSHR handling on fill
|
ahansson
|
October 13th, 2015, 3:35 p.m.
|
|
|
|
[Submitted] Bus: Make the default bus width 8 bytes instead of 64
|
ahansson
|
June 11th, 2012, 7:44 a.m.
|
|
|
|
[Submitted] Config: Use clock option in se/fs script and pass to switch_cpus
|
ahansson
|
July 10th, 2012, 4:14 a.m.
|
|
|
|
[Submitted] PacketQueue: Allow queuing in the same tick as desired send tick
|
ahansson
|
August 3rd, 2012, 9:29 a.m.
|
|
|
|
[Submitted] AddrRange: Simplify AddrRange params Python hierarchy
|
ahansson
|
August 29th, 2012, 11:52 a.m.
|
|
|
|
[Submitted] Checkpoint: Pass maxtick to avoid undefined variable
|
ahansson
|
September 11th, 2012, 9:19 a.m.
|
|
|
|
[Submitted] Configs: Set the memtest clock to a reasonable value
|
ahansson
|
September 28th, 2012, 6:17 a.m.
|
|
|
|
stats: Add SQLite database as an output format
|
ahansson
|
January 15th, 2013, 10:26 a.m.
|
|
|
|
[Submitted] scons: Fix up numerous warnings about name shadowing
|
ahansson
|
February 14th, 2013, 1:53 a.m.
|
|
|
|
[Submitted] mem: Avoid explicitly zeroing the memory backing store
|
ahansson
|
April 22nd, 2013, 2:44 p.m.
|
|
|
|
[Submitted] mem: Squash prefetch requests from downstream caches
|
ahansson
|
April 23rd, 2014, 12:21 p.m.
|
|
|
|
[Submitted] mem: Remove the GHB prefetcher from the source tree
|
ahansson
|
September 10th, 2014, 7:51 a.m.
|
|
|
|
[Submitted] mem: Dynamically determine page bytes in memory components
|
ahansson
|
September 29th, 2014, 10:39 a.m.
|
|
|
|
[Submitted] config: add --root-device machine parameter
|
ahansson
|
January 28th, 2015, 10:06 a.m.
|
|
|
|
[Submitted] arm: Relax ordering for some uncacheable accesses
|
ahansson
|
March 30th, 2015, 9:17 a.m.
|
|
|
|
[Submitted] MEM: Separate queries for snooping and address ranges
|
ahansson
|
December 19th, 2011, 5:58 a.m.
|
|
|
|
[Submitted] MEM: Clean-up of Functional/Virtual/TranslatingPort remnants
|
ahansson
|
January 29th, 2012, 10:49 a.m.
|
|
|
|
[Discarded] Cache: Remove redundant check for uncacheable snoops
|
ahansson
|
May 18th, 2012, 9:12 a.m.
|
|