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[Discarded] multi-gem5: Add an optional key parameter for the initparam pseudo instruction.
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cdunham
|
September 21st, 2015, 6:59 p.m.
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[Submitted] cpu: Enforce 1 interrupt controller per thread
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cdunham
|
October 5th, 2015, 6:52 p.m.
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[Submitted] config: Enable elastic trace capture and replay in se/fs
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cdunham
|
August 11th, 2015, 9:05 p.m.
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[Submitted] cpu: Create record type enum for elastic traces
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cdunham
|
September 3rd, 2015, 4:17 p.m.
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[Submitted] cpu: Support virtual addr in elastic traces
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cdunham
|
September 3rd, 2015, 4:17 p.m.
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[Submitted] cpu: Add TraceCPU to playback elastic traces
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cdunham
|
August 11th, 2015, 9:05 p.m.
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[Submitted] proto, probe: Add elastic trace probe to o3 cpu
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cdunham
|
August 11th, 2015, 9:05 p.m.
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[Submitted] mem: Add instruction sequence number to request
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cdunham
|
August 11th, 2015, 9:05 p.m.
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[Submitted] util: Add decode and encode scripts for elastic traces
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cdunham
|
August 11th, 2015, 9:05 p.m.
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[Submitted] probe: Add probe in Fetch, IEW, Rename and Commit
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cdunham
|
August 11th, 2015, 9:05 p.m.
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[Submitted] pseudo inst,util: Add an optional key parameter for the initparam pseudo instruction
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cdunham
|
November 19th, 2015, 5:44 p.m.
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[Submitted] dist: Config file and parameter changes for distributed gem5 simulations
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cdunham
|
November 19th, 2015, 5:44 p.m.
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[Submitted] dist: Distributed Ethernet link support for distributed gem5 simulations
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cdunham
|
November 19th, 2015, 5:44 p.m.
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[Submitted] sim: always generate sim/tags.cc
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cdunham
|
January 29th, 2016, 11:57 p.m.
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[Submitted] base: support gzip-compressed object files
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cdunham
|
September 21st, 2015, 11:42 p.m.
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[Submitted] cpu: Fix LLSC atomic CPU wakeup
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cdunham
|
February 9th, 2016, 9:29 p.m.
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[Submitted] arm: Squash after returning from exceptions in v7
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cdunham
|
February 10th, 2016, 12:04 a.m.
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[Submitted] mem, cpu: Add assertions to snoop invalidation logic
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cdunham
|
February 11th, 2016, 12:31 a.m.
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[Submitted] util: update Java JNI interface to m5ops
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cdunham
|
February 13th, 2016, 12:33 a.m.
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[Submitted] cpu: Query CPU for inst executed from Python
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cdunham
|
March 4th, 2016, 11:03 p.m.
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[Submitted] sim: Fix clock_domain unserialization
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cdunham
|
February 25th, 2016, 11:56 p.m.
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[Submitted] misc: Add secondary dot output for DVFS domains
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cdunham
|
February 25th, 2016, 11:56 p.m.
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[Submitted] sim: Adding thermal model support
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cdunham
|
March 5th, 2016, 12:21 a.m.
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[Submitted] sim: Thermal support for Linux
|
cdunham
|
March 5th, 2016, 12:21 a.m.
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[Submitted] pwr: Add power states to ClockedObject
|
cdunham
|
March 5th, 2016, 12:21 a.m.
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[Submitted] pwr: Low-power idle power state for idle CPUs
|
cdunham
|
March 5th, 2016, 12:21 a.m.
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[Submitted] sim: Adding support for power models
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cdunham
|
March 5th, 2016, 12:21 a.m.
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[Submitted] cpu: Add instruction opclass histogram to minor
|
cdunham
|
February 23rd, 2016, 8:58 p.m.
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[Submitted] sim: Add additional debug information when draining
|
cdunham
|
February 25th, 2016, 11:56 p.m.
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[Submitted] mem: Remove threadId from memory request class
|
cdunham
|
February 23rd, 2016, 8:58 p.m.
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[Submitted] cpu: Implement per-thread GHRs
|
cdunham
|
February 23rd, 2016, 8:58 p.m.
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[Submitted] cpu: Fix BTB threading oversight
|
cdunham
|
February 23rd, 2016, 8:58 p.m.
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[Submitted] cpu: Add an indirect branch target predictor
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cdunham
|
February 23rd, 2016, 8:58 p.m.
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[Submitted] mem: Add snoop traffic statistic
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cdunham
|
May 31st, 2016, 10:43 a.m.
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[Submitted] base: Add total() to Vector2D stat
|
cdunham
|
May 31st, 2016, 10:43 a.m.
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[Submitted] isa: Modify get/check interrupt routines
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cdunham
|
July 5th, 2016, 2 p.m.
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[Submitted] cpu: Fix Minor SMT WFI/drain interaction issues
|
cdunham
|
July 5th, 2016, 2 p.m.
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[Submitted] cpu: Add SMT support to MinorCPU
|
cdunham
|
February 23rd, 2016, 8:58 p.m.
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[Submitted] arm, config: Add an example ARM big.LITTLE(tm) configuration script
|
cdunham
|
July 8th, 2016, 10:28 a.m.
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[Submitted] arm: change instruction classes to catch hyp traps
|
cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: add stage2 translation support
|
cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: enable EL2 support
|
cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Add AArch64 hypervisor call instruction 'hvc'
|
cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Fix EL perceived at TLB for address translation instructions
|
cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Add check to fault routing for hypervisor/virtualization
|
cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Refactor aarch64 table walk logic to remove redundancy
|
cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Fix secure state checking in various places
|
cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Fix trapping to Hypervisor during MSR/MRS read/write
|
cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Fix stage 2 memory attribute checking in AArch64
|
cdunham
|
June 21st, 2016, 1:41 p.m.
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[Submitted] arm: Add TLBI instruction for stage 2 IPA's
|
cdunham
|
June 21st, 2016, 1:41 p.m.
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|
