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[Submitted] MIPS: Always compile in setExceptionState, including in SE mode.
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gblack
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September 12th, 2011, 5:36 a.m.
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mips: add support for branch likely instruction
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guody
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June 20th, 2011, 3:21 a.m.
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[Submitted] MIPS: Add constructors to the fault classes.
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gblack
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September 12th, 2011, 5:29 a.m.
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MIPS: add a head file for stacktrace.cc
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guody
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January 16th, 2012, 8:47 a.m.
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[Submitted] MIPS: add a debugging flag head file in vtophys.cc
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guody
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January 16th, 2012, 7:51 a.m.
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[Submitted] MIPS, faults: Update how the PC is set.
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gblack
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September 12th, 2011, 5:38 a.m.
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[Discarded] MIPS InorderCPU branch problems
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guody
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June 13th, 2011, 12:16 a.m.
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[Submitted] minor: fixed LSQ MasterPortID
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lukefahr
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November 10th, 2014, 5:20 p.m.
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[Discarded] minor fixes to garnet flexible pipeline code
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tushar
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March 11th, 2011, 9:32 a.m.
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[Submitted] MessagePort: implemented virtual recvTiming avoiding double delete
|
beckmann
|
January 6th, 2011, 3:22 p.m.
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[Submitted] MESI: Add queues for stalled requests
|
nilay
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December 2nd, 2010, 3:58 a.m.
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[Submitted] MESI Coherence Protocol: Fix L2 miss statistics
|
nilay
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December 30th, 2011, 3:48 p.m.
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[Submitted] MESI Coherence Protocol: Add calls for profiling misses
|
nilay
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November 1st, 2011, 10:29 p.m.
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[Submitted] memtest: move check on outstanding requests
|
nilay
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October 3rd, 2012, 9:10 p.m.
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[Submitted] memtest: Memtester support for DMA
|
beckmann
|
August 5th, 2010, 9:14 p.m.
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[Submitted] MemCmd: Add a command for invalidation requests to LSQ
|
nilay
|
January 13th, 2012, 3:58 a.m.
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mem: [DRAFT] Make DRAMCtrl response queue finite
|
jthestness
|
February 8th, 2016, 7:58 p.m.
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[Submitted] mem: write streaming support via WriteInvalidate promotion
|
ahansson
|
August 13th, 2014, 2:08 p.m.
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[Submitted] mem: write combining for ruby protocols
|
atgutier
|
November 12th, 2015, 10:05 p.m.
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[Submitted] mem: Wakeup sleeping CPUs without caches on LLSC
|
ahansson
|
February 21st, 2014, 1:21 p.m.
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[Discarded] MEM: VirtualPorts are replaced with FSTranslatingProxys
|
ahansson
|
November 28th, 2011, 10:20 a.m.
|
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[Submitted] mem: Use the same timing calculation for DRAM read and write
|
ahansson
|
October 16th, 2013, 7:40 a.m.
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[Submitted] mem: Use the range cache for lookup as well as access
|
ahansson
|
February 3rd, 2015, 7:57 p.m.
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[Submitted] mem: Use the packet delays and do not just zero them out
|
ahansson
|
October 30th, 2015, 10:35 a.m.
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[Submitted] mem: Use STL deque in favour of list for DRAM queues
|
ahansson
|
July 18th, 2013, 12:59 p.m.
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[Submitted] mem: Use shared_ptr for Ruby Message classes
|
ahansson
|
September 29th, 2014, 10:40 a.m.
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[Submitted] Mem: Use range operations in bus in preparation for striping
|
ahansson
|
September 21st, 2012, 9 a.m.
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[Submitted] mem: Use pkt::getBlockAddr instead of BaseCace::blockAlign
|
nnikoleris
|
February 22nd, 2017, 8 a.m.
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[Submitted] mem: Use FromCache attribute in snoop filter allocation
|
andysan
|
July 12th, 2016, 7:15 a.m.
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[Submitted] Mem: Use deque instead of list for bus retries
|
ahansson
|
October 12th, 2012, 1:41 a.m.
|
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[Submitted] Mem: Use cycles to express cache-related latencies
|
ahansson
|
September 28th, 2012, 7 a.m.
|
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[Submitted] mem: Use const pointers for port proxy write functions
|
ahansson
|
November 17th, 2014, 6:14 a.m.
|
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[Submitted] mem: Use C++11 delegating constructors for Request
|
ahansson
|
August 19th, 2015, 9:06 a.m.
|
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[Submitted] MEM: Use base class Master/SlavePort pointers in the bus
|
ahansson
|
April 9th, 2012, 9:40 a.m.
|
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[Submitted] mem: Use a flag instead of address bit 63 for generic IPRs
|
andysan
|
October 7th, 2013, 12:13 p.m.
|
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[Submitted] mem: Update mostly exclusive policy even further
|
andysan
|
July 12th, 2016, 7:15 a.m.
|
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[Discarded] mem: Update mostly exclusive cache policy to cover more cases
|
ahansson
|
April 11th, 2016, 5:08 p.m.
|
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[Submitted] mem: Update mostly exclusive cache policy to cover more cases
|
andysan
|
July 12th, 2016, 7:14 a.m.
|
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[Submitted] mem: Update DRAM configuration names
|
cdunham
|
January 17th, 2017, 10:04 p.m.
|
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[Submitted] mem: Update DRAM command scheduler for bank groups
|
ahansson
|
June 25th, 2015, 7:30 a.m.
|
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[Submitted] mem: update DDR3 die revision
|
cdunham
|
August 4th, 2016, 4:35 p.m.
|
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[Submitted] mem: Update DDR3 and DDR4 based on datasheets
|
ahansson
|
April 23rd, 2014, 12:37 p.m.
|
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[Submitted] mem: Unify request selection for read and write queues
|
ahansson
|
October 16th, 2013, 7:48 a.m.
|
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[Submitted] mem: Unify delayed packet deletion
|
ahansson
|
October 26th, 2015, 6:13 p.m.
|
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[Submitted] MEM: Unify bus access methods and prepare for master/slave split
|
ahansson
|
February 29th, 2012, 3:06 a.m.
|
|
|
|
mem: Trigger DRAMCtrl resp queue panic
|
jthestness
|
February 2nd, 2016, 1:08 a.m.
|
|
|
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[Discarded] MEM: TranslatingPorts are replaced with SETranslatingProxys
|
ahansson
|
November 28th, 2011, 10:16 a.m.
|
|
|
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[Submitted] mem: Transition away from isSupplyExclusive for writebacks
|
ahansson
|
July 13th, 2015, 3:16 p.m.
|
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[Submitted] mem: Track DRAM read/write switching and add hysteresis
|
ahansson
|
March 17th, 2014, 8:16 a.m.
|
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[Submitted] mem: Tighten up cache constness and scoping
|
ahansson
|
February 14th, 2013, 1:53 a.m.
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