Changeset 9356:603d6ef97673
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O3: Revert arm_detailed cache latencies

Changeset 9322 changed the arm_detailed cache latencies from 1ns to 1 cycle.
Since the default clock is 500ps, the latencies are now half of what they were.
This patch doubles the latencies so they are identical to what they were
before.

This patch does NOT change the tol2bus clock back to 1GHz (currently 2GHz).
Perhaps it should?

arm_detailed isn't covered by a regression. Confirmed that changes have
expected effect on config.ini.