ARM: Further break up condition code into NZ, C, V bits.
Review Request #681 - Created May 4, 2011 and submitted - Latest diff uploaded
| Information | |
|---|---|
| Ali Saidi | |
| gem5 | |
| Reviewers | |
| Default | |
| ali, gblack, nate, stever | |
ARM: Further break up condition code into NZ, C, V bits. Break up the condition code bits into NZ, C, V registers. These are individually written and this removes some incorrect dependencies between instructions.