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[Submitted] cpu: Fix o3 quiesce fetch bug
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ahansson
|
August 23rd, 2014, 5:08 a.m.
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[Submitted] cpu: Fix SMT scheduling issue with the O3 cpu
|
ali
|
June 12th, 2014, 10:50 p.m.
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[Submitted] cpu: Fix incorrect speculative branch predictor behavior
|
ali
|
June 12th, 2014, 10:50 p.m.
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[Submitted] cpu: Add a fetch queue to the o3 cpu.
|
ali
|
June 12th, 2014, 10:49 p.m.
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[Submitted] o3: Fix front-end pipeline interlock behavior
|
ali
|
June 12th, 2014, 10:49 p.m.
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[Submitted] cpu: Change writeback modeling for outstanding instructions
|
ali
|
June 12th, 2014, 10:48 p.m.
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[Submitted] arch: Properly guess OpClass from optional StaticInst flags
|
ali
|
June 12th, 2014, 10:47 p.m.
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[Submitted] cache: Fix handling of LL/SC requests under contention
|
ali
|
June 12th, 2014, 10:46 p.m.
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[Submitted] arm: support 16kb vm granules
|
ahansson
|
August 13th, 2014, 12:50 p.m.
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[Submitted] mem: Add utility script to plot DRAM efficiency sweep
|
ahansson
|
August 13th, 2014, 12:49 p.m.
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[Submitted] arch, cpu: Factor out the ExecContext into a proper base class
|
ahansson
|
August 19th, 2014, 9:28 a.m.
|
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[Submitted] arch: Cleanup unused ISA traits constants
|
ahansson
|
August 22nd, 2014, 8:17 a.m.
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[Submitted] config: Change parsing of Addr so hex values work from scripts
|
ali
|
June 12th, 2014, 10:47 p.m.
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[Submitted] mem: write streaming support via WriteInvalidate promotion
|
ahansson
|
August 13th, 2014, 2:08 p.m.
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config, x86: add ethernet support for x86 fullsystem
|
majiuyue
|
June 13th, 2014, 9:23 a.m.
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[Submitted] ruby: Fixes clock domains in configuration files.
|
castilloe
|
March 31st, 2014, 10:52 a.m.
|
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[Submitted] build opts: add MI_example to NULL ISA
|
nilay
|
August 28th, 2014, 6 p.m.
|
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[Submitted] ruby: message buffers: significant changes
|
nilay
|
August 16th, 2014, 1:17 a.m.
|
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[Submitted] mem: change the namespace Message to ProtoMessage
|
nilay
|
August 28th, 2014, 6 p.m.
|
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[Submitted] ruby: remove typedef of Index as int64
|
nilay
|
August 16th, 2014, 1:32 a.m.
|
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[Submitted] ruby: eliminate type Time
|
nilay
|
August 16th, 2014, 12:35 a.m.
|
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[Submitted] x86: set op class of two fp instructions
|
nilay
|
August 16th, 2014, 1:27 a.m.
|
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[Submitted] ruby: slicc: change the way configurable members are specified
|
nilay
|
August 16th, 2014, 1:02 a.m.
|
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[Submitted] ruby: slicc: improve the grammar
|
nilay
|
August 16th, 2014, 12:50 a.m.
|
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[Submitted] ruby: slicc: donot prefix machine name to variables
|
nilay
|
August 16th, 2014, 12:48 a.m.
|
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[Submitted] ruby: network: move getNumNodes() to base class
|
nilay
|
August 16th, 2014, 12:38 a.m.
|
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[Submitted] ruby: move files from ruby/system to ruby/structures
|
nilay
|
December 3rd, 2012, 1:49 p.m.
|
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[Submitted] sim: bump checkpoint version for multiple event queues
|
ahansson
|
August 13th, 2014, 12:49 p.m.
|
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[Discarded] DEBUG: Added a path option to tracediff
|
wilwan01
|
January 30th, 2012, 2:34 a.m.
|
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[Discarded] params: add a mechanism to the config system to specify cycles
|
nate
|
April 18th, 2010, 10:33 p.m.
|
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[Discarded] [ARM] Full System simulation up to 8 cores
|
butko
|
June 6th, 2012, 8:50 a.m.
|
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[Submitted] style: Fixup strange semantics in hg m5style
|
ahansson
|
August 13th, 2014, 12:51 p.m.
|
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[Submitted] style: Add support for a style ignore list and ignore ext/
|
ahansson
|
August 13th, 2014, 12:51 p.m.
|
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[Submitted] base: Replace the internal varargs stuff with C++11 constructs
|
ahansson
|
August 13th, 2014, 12:51 p.m.
|
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[Submitted] base: Add compiler macros for C++11 final/override
|
ahansson
|
August 13th, 2014, 12:50 p.m.
|
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[Submitted] mem: Fix address interleaving bug in DRAM controller
|
ahansson
|
August 13th, 2014, 12:49 p.m.
|
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[Submitted] misc: README direct to website for dependencies
|
ahansson
|
August 17th, 2014, 10:46 a.m.
|
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|
|
Adding TSX support to gem5
|
pradip16
|
July 5th, 2014, 3:10 a.m.
|
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|
[Discarded] added DRAMsimII to the m5 repo
|
joegross
|
November 17th, 2010, 3:39 p.m.
|
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|
|
sim: stopgap for race-conditions when using multiple EventQueues
|
mbrown
|
August 1st, 2014, 5:54 p.m.
|
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[Submitted] scons: Warn for incompatible gcc and binutils
|
ahansson
|
July 28th, 2014, 5:50 a.m.
|
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[Submitted] config: Add SubSystem container for simobjects
|
ahansson
|
July 28th, 2014, 5:50 a.m.
|
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[Submitted] config: Add hooks to enable new config sys
|
ahansson
|
April 23rd, 2014, 12:22 p.m.
|
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[Discarded] Different SimpleDRAM latency for read and write access
|
senni
|
December 5th, 2013, 10:23 a.m.
|
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[Submitted] cpu: `Minor' in-order CPU model
|
ali
|
May 30th, 2014, 3:23 p.m.
|
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[Submitted] arm: make the PseudoLRU tags the default for the O3_ARM_v7aL2
|
atgutier
|
February 21st, 2014, 10:18 p.m.
|
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[Submitted] mem: refactor LRU cache tags and add random replacment tags
|
atgutier
|
February 21st, 2014, 10:11 p.m.
|
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[Submitted] x86: make PioBus return BadAddress errors
|
stever
|
June 21st, 2014, 4:53 p.m.
|
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|
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[Submitted] sim: remove unused MemoryModeStrings array
|
stever
|
June 24th, 2014, 6:12 a.m.
|
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[Submitted] syscall emulation: fix DPRINTF arg ordering bug
|
stever
|
July 3rd, 2014, 5:12 p.m.
|
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