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[Submitted] mem: Cleanup packet accessor methods
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andysan
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July 7th, 2015, 4:57 p.m.
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[Submitted] dev, arm: Split MCC and DCC subsystems
|
andysan
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November 24th, 2015, 2:16 p.m.
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[Submitted] scons, style: Rename style.py to hgstyle.py
|
andysan
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March 16th, 2016, 11:40 a.m.
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[Submitted] config: Don't call sys.exit in interactive mode in run()
|
andysan
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February 7th, 2013, 3:31 a.m.
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[Submitted] kvm: FPU synchronization support on x86
|
andysan
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September 10th, 2013, 1:34 p.m.
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[Submitted] cpu: simple: Add support for using branch predictors
|
andysan
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November 29th, 2013, 4:36 p.m.
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[Submitted] sim: Add the ability to lock and migrate between event queues
|
andysan
|
March 6th, 2014, 12:28 p.m.
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[Submitted] ruby: Use the const serialize interface in RubySystem
|
andysan
|
August 19th, 2015, 1:39 p.m.
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[Submitted] tests: Split test results into running and verification
|
andysan
|
June 6th, 2016, 4:50 p.m.
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[Submitted] base: Refactor logging to make log level selection cleaner
|
andysan
|
February 21st, 2017, 6:54 p.m.
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[Submitted] dev: Clean up MC146818 register (A & B) handling
|
andysan
|
May 2nd, 2013, 3:16 a.m.
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[Submitted] base: Declare a type for context IDs
|
andysan
|
July 7th, 2015, 2:34 p.m.
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[Submitted] config: Fix omission of walker cache in config scripts
|
andysan
|
May 27th, 2016, 2 p.m.
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[Submitted] mem: Update mostly exclusive policy even further
|
andysan
|
July 12th, 2016, 7:15 a.m.
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[Submitted] python: Move native wrappers to the _m5 namespace
|
andysan
|
December 20th, 2016, 8:10 a.m.
|
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[Submitted] x86: Fix the flag handling code in FABS and FCHS
|
andysan
|
June 11th, 2013, 5:47 a.m.
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[Submitted] kvm: x86: Add support for x86 INIT and STARTUP handling
|
andysan
|
March 3rd, 2014, 3:59 p.m.
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[Submitted] dev, arm: Add virtual timers to the generic timer model
|
andysan
|
May 7th, 2015, 11 a.m.
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[Submitted] base: Add serialization support to Pixels and FrameBuffer
|
andysan
|
June 8th, 2015, 5:17 p.m.
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[Submitted] dev, arm: Add support for automatic PCI interrupt routing
|
andysan
|
December 5th, 2015, 12:33 a.m.
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[Submitted] kvm: Add an option to force context sync on kvm entry/exit
|
andysan
|
March 16th, 2016, 5:44 p.m.
|
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[Submitted] arm, config: Add initial support for Ruby
|
andysan
|
July 22nd, 2016, 3:06 p.m.
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[Submitted] cpu: Support exit when any one Trace CPU completes replay
|
andysan
|
August 12th, 2016, 4:45 p.m.
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[Submitted] cpu: Add support for scheduling multiple inst/load stop events
|
andysan
|
June 3rd, 2013, 5:26 a.m.
|
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gpu-compute: Changed stat name for AMD architecture
|
apattnai
|
May 16th, 2016, 9:29 p.m.
|
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x86: Fix SMT support (zeroReg, TLBs)
|
apellegr
|
June 29th, 2012, 3:15 p.m.
|
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[Submitted] cpu: implement L-TAGE branch predictor
|
aperais
|
November 22nd, 2016, 2:31 p.m.
|
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[Submitted] cpu: disallow speculative update of the conditional branch predictor tables (o3)
|
aperais
|
November 18th, 2016, 3:14 p.m.
|
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arm: Implement store-pair (aarch64) as a single micro-op
|
aperais
|
January 26th, 2016, 9 p.m.
|
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[Submitted] o3: Clarify meaning of cachePorts variable in lsq_unit.hh
|
aperais
|
April 26th, 2016, 12:42 p.m.
|
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[Submitted] cpu: change comments in tournament branch predictor to reflect what the code does
|
aperais
|
November 18th, 2016, 12:41 p.m.
|
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[Submitted] cpu: Resolve targets of predicted 'taken' conditional direct branches at decode (o3)
|
aperais
|
November 17th, 2016, 10:29 a.m.
|
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[Submitted] riscv: [Patch 7/5] Corrected LRSC semantics
|
aroelke
|
November 2nd, 2016, 7:34 p.m.
|
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[Submitted] riscv: [Patch 2/5] Added RISC-V multiply extension RV64M
|
aroelke
|
September 19th, 2016, 7:12 p.m.
|
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[Submitted] riscv: [Patch 8/5] Added some regression tests to RISC-V
|
aroelke
|
November 3rd, 2016, 7:36 p.m.
|
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[Submitted] riscv: Fix crash when syscall argument reg index is too high
|
aroelke
|
January 12th, 2017, 9 p.m.
|
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[Submitted] riscv: [Patch 3/5] Added RISCV floating point extensions RV64FD
|
aroelke
|
September 19th, 2016, 7:26 p.m.
|
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[Submitted] riscv: [Patch 6/5] Improve Linux emulation for RISC-V
|
aroelke
|
October 14th, 2016, 6:17 p.m.
|
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[Submitted] riscv: Remove ECALL tests from insttest
|
aroelke
|
January 12th, 2017, 9:18 p.m.
|
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[Submitted] riscv: [Patch 4/5] Added RISC-V atomic memory extension RV64A
|
aroelke
|
September 19th, 2016, 7:41 p.m.
|
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[Submitted] riscv: [Patch 5/5] Added missing support for timing CPU models
|
aroelke
|
September 19th, 2016, 8:14 p.m.
|
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[Submitted] arch: [Patch 1/5] Added RISC-V base instruction set RV64I
|
aroelke
|
September 14th, 2016, 10:45 p.m.
|
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[Submitted] ext: add McPAT source
|
atgutier
|
September 20th, 2013, 1:34 a.m.
|
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|
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[Submitted] ruby: re-added the addressToInt slicc interface function
|
atgutier
|
May 11th, 2015, 10:18 p.m.
|
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[Submitted] slicc: fix error in conflicing symbol declaration
|
atgutier
|
May 11th, 2015, 10:20 p.m.
|
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[Submitted] sim: support for distcc pump server settings
|
atgutier
|
October 30th, 2015, 9:52 p.m.
|
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[Submitted] ruby: make a RequestDesc class instead of std::pair
|
atgutier
|
October 13th, 2016, 9:24 p.m.
|
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[Submitted] cpu: implement bi-mode-style branch predictor
|
atgutier
|
February 21st, 2014, 10:19 p.m.
|
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[Submitted] arm: fix build_drive_system when not using default options
|
atgutier
|
November 5th, 2014, 9:02 p.m.
|
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[Submitted] slicc: fix missing inline function in LocalVariableAST
|
atgutier
|
May 11th, 2015, 10:22 p.m.
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